Jacques Christophe Rudell
Orcid: 0000-0002-8531-2999
According to our database1,
Jacques Christophe Rudell
authored at least 49 papers
between 1995 and 2024.
Collaborative distances:
Collaborative distances:
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Bibliography
2024
A 2.4-GHz Full-Duplex Transceiver With Broadband, Linearity-Enhanced, and Long-Delay Spread Self-Interference Cancellation.
IEEE J. Solid State Circuits, April, 2024
2022
An Optimal Digital Beamformer for mm-Wave Phased Arrays with 660MHz Instantaneous Bandwidth in 28nm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022
A 2.4GHz Full-Duplex Transceiver with Broadband (+120MHz), Linearity-Calibrated and Long-Delayed Self-Interference Cancellation.
Proceedings of the 48th IEEE European Solid State Circuits Conference, 2022
Proceedings of the 48th IEEE European Solid State Circuits Conference, 2022
2021
A Reconfigurable Non-Uniform Power-Combining V-Band PA With +17.9 dBm P<sub>sat</sub> and 26.5% PAE in 16-nm FinFET CMOS.
IEEE J. Solid State Circuits, 2021
A Mm-Wave Gm-Assisted Transformer-Based Matching Network 2x2 Phased-Array Receiver for 5G Communication and Radar Systems.
Proceedings of the IEEE Radio and Wireless Symposium, 2021
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
A 46-channel Vector Stimulator with 50mV Worst-Case Common-Mode Artifact for Low-Latency Adaptive Closed-Loop Neuromodulation.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2021
2020
A 0.0023 mm<sup>2</sup>/ch. Delta-Encoded, Time-Division Multiplexed Mixed-Signal ECoG Recording Architecture With Stimulus Artifact Suppression.
IEEE Trans. Biomed. Circuits Syst., 2020
A Single-Chip Bidirectional Neural Interface With High-Voltage Stimulation and Adaptive Artifact Cancellation in Standard CMOS.
IEEE J. Solid State Circuits, 2020
2019
A Bidirectional Brain Computer Interface with 64-Channel Recording, Resonant Stimulation and Artifact Suppression in Standard 65nm CMOS.
Proceedings of the 45th IEEE European Solid State Circuits Conference, 2019
2018
Wideband Dual-Injection Path Self-Interference Cancellation Architecture for Full-Duplex Transceivers.
IEEE J. Solid State Circuits, 2018
A broadband and deep-TX self-interference cancellation technique for full-duplex and frequency-domain-duplex transceiver applications.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018
Integrated CMOS transceivers design towards flexible full duplex (FD) and frequency division duplex (FDD) systems.
Proceedings of the 2018 IEEE Custom Integrated Circuits Conference, 2018
2017
18.1 A 1.7-to-2.2GHz full-duplex transceiver system with >50dB self-interference cancellation over 42MHz bandwidth.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
A low-noise reconfigurable full-duplex front-end with self-interference cancellation and harmonic-rejection power amplifier for low power radio applications.
Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017
A CMOS front-end interface ASIC for SiPM-based positron emission tomography imaging systems.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2017
2016
IEEE Trans. Circuits Syst. II Express Briefs, 2016
An Ultra-Wideband IF Millimeter-Wave Receiver With a 20 GHz Channel Bandwidth Using Gain-Equalized Transformers.
IEEE J. Solid State Circuits, 2016
Proceedings of the 29th IEEE International System-on-Chip Conference, 2016
Statistical computational methods for mixed-signal performance metrics under process variations and noise models.
Proceedings of the 14th IEEE International New Circuits and Systems Conference, 2016
Regenerative Breaking: Recovering Stored Energy from Inactive Voltage Domains for Energy-efficient Systems-on-Chip.
Proceedings of the 2016 International Symposium on Low Power Electronics and Design, 2016
A high-voltage compliant, electrode-invariant neural stimulator front-end in 65nm bulk-CMOS.
Proceedings of the ESSCIRC Conference 2016: 42<sup>nd</sup> European Solid-State Circuits Conference, 2016
2015
IEEE J. Solid State Circuits, 2015
A Compact 77% Fractional Bandwidth CMOS Band-Pass Distributed Amplifier With Mirror-Symmetric Norton Transforms.
IEEE J. Solid State Circuits, 2015
A 55-70GHz two-stage tunable polyphase filter with feedback control for quadrature generation with <2° and <0.32dB phase/amplitude imbalance in 28nm CMOS process.
Proceedings of the ESSCIRC Conference 2015, 2015
2014
A 12 bit 200 MS/s Zero-Crossing-Based Pipelined ADC With Early Sub-ADC Decision and Output Residue Background Calibration.
IEEE J. Solid State Circuits, 2014
High-voltage compliant, capacitive-load invariant neural stimulation electronics compatible with standard bulk-CMOS integration.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2014
2013
A Fully Integrated, Regulatorless CMOS Power Amplifier for Long-Range Wireless Sensor Communication.
IEEE J. Solid State Circuits, 2013
2012
A 0.8-2 GHz Fully-Integrated QPLL-Timed Direct-RF-Sampling Bandpass ΣΔ ADC in 0.13 µm CMOS.
IEEE J. Solid State Circuits, 2012
Strategies for highly-integrated long-range silicon transceivers for sensor data communication.
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012
2011
Proceedings of the 2011 International Green Computing Conference and Workshops, 2011
2010
Proceedings of the IEEE International Solid-State Circuits Conference, 2010
2009
Proceedings of the IEEE International Solid-State Circuits Conference, 2009
A 1.1V 5-to-6GHz reduced-component direct-conversion transmit signal path in 45nm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009
2008
Overview for the Special Section on the 2007 Radio Frequency Integrated Circuits Symposium.
IEEE J. Solid State Circuits, 2008
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008
2007
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007
2005
Introduction to the Special Issue on the 2005 IEEE International Solid-State Circuits Conference.
IEEE J. Solid State Circuits, 2005
2003
A single-chip digitally calibrated 5.15-5.825-GHz 0.18-μm CMOS transceiver for 802.11a wireless LAN.
IEEE J. Solid State Circuits, 2003
2001
A 1.75-GHz highly integrated narrow-band CMOS transmitter with harmonic-rejection mixers.
IEEE J. Solid State Circuits, 2001
1998
Recent developments in high integration multi-standard CMOS transceivers for personal communication systems.
Proceedings of the 1998 International Symposium on Low Power Electronics and Design, 1998
1997
A 1.9-GHz wide-band IF double conversion CMOS receiver for cordless telephone applications.
IEEE J. Solid State Circuits, 1997
1995
IEEE J. Solid State Circuits, March, 1995