Stay Away from Minimum Design-Rule Values. - Chris W. H. Strolenberg (DATE, 2000)

Tutorial Statement. - Yervant Zorian; Michael Nicolaidis; Peter Muhmenthaler; David Y. Lepejian; Chris W. H. Strolenberg; Kees Veelenturf (DATE, 2000)

Formal Analysis of Non-determinism in Verilog Cell Library Simulation Models. - Matthias Raffelsieper; Mohammad Reza Mousavi 001; Jan-Willem Roorda; Chris W. H. Strolenberg; Hans Zantema (FMICS, 2009)

Checking and deriving module paths in Verilog cell library descriptions. - Matthias Raffelsieper; Mohammad Reza Mousavi 001; Chris W. H. Strolenberg (DATE, 2010)