A statistical design method for Giga Bit memory arrays and beyond. - Christian Caillat; Eric Carman; Jean Michel Daga; Cedric Ouvrard; Philippe Bauser (ICECS, 2010)

Low-power DRAM-compatible Replacement Gate High-k/Metal Gate stacks. - Romain Ritzenthaler; Tom Schram; Erik Bury; Jérôme Mitard; L.-Å. Ragnarsson; Guido Groeseneken; N. Horiguchi; Aaron Thean; Alessio Spessot; Christian Caillat; V. Srividya; Pierre Fazan (ESSDERC, 2012)

On the correlation between the retention time of FBRAM and the low-frequency noise of UTBOX SOI nMOSFETs. - Eddy Simoen; Marc Aoulaiche; Anabela Veloso; M. Jurczak; Cor Claeys; L. Mendes Almeida; Maria Glória Caño de Andrade; A. Luque Rodriguez; J. A. Jimenez Tejada; Christian Caillat; Pierre Fazan (ESSDERC, 2012)

Impact of Al2O3 position on performances and reliability in high-k metal gated DRAM periphery transistors. - Marc Aoulaiche; Eddy Simoen; Romain Ritzenthaler; Tom Schram; Hiroaki Arimura; Moonju Cho; Thomas Kauerauf; Guido Groeseneken; Naoto Horiguchi; Aaron Thean; Antonio Federico; Felice Crupi; et al. (ESSDERC, 2013)

I/O thick oxide device integration using Diffusion and Gate Replacement (D&GR) gate stack integration. - Romain Ritzenthaler; Tom Schram; M. J. Cho; Anda Mocuta; Naoto Horiguchi; Aaron Voon-Yew Thean; Alessio Spessot; Christian Caillat; Marc Aoulaiche; Pierre Fazan; K. B. Noh; Y. Son (ICICDT, 2015)