Blue Gene/L compute chip: Synthesis, timing, and physical design. - Arthur A. Bright; Ruud A. Haring; Marc Boris Dombrowa; Martin Ohmacht; Dirk Hoenicke; Sarabjeet Singh; James A. Marcella; Robert F. Lembach; Steve M. Douskey; Matthew R. Ellavsky; Christian G. Zoellin; Alan Gara (IBM J. Res. Dev., 2005)

BIST Power Reduction Using Scan-Chain Disable in the Cell Processor. - Christian G. Zoellin; Hans-Joachim Wunderlich; Nicolas Mäding; Jens Leenstra (ITC, 2006)

Scan Test Planning for Power Reduction. - Michael E. Imhof; Christian G. Zoellin; Hans-Joachim Wunderlich; Nicolas Mäding; Jens Leenstra (DAC, 2007)

A Refined Electrical Model for Particle Strikes and its Impact on SEU Prediction. - Sybille Hellebrand; Christian G. Zoellin; Hans-Joachim Wunderlich; Stefan Ludwig; Torsten Coym; Bernd Straube (DFT, 2007)

Programmable deterministic Built-In Self-Test. - Abdul Wahid Hakmi; Hans-Joachim Wunderlich; Christian G. Zoellin; Andreas Glowatz; Friedrich Hapke; Jürgen Schlöffel; Laurent Souef (ITC, 2007)

Scan chain clustering for test power reduction. - Melanie Elm; Hans-Joachim Wunderlich; Michael E. Imhof; Christian G. Zoellin; Jens Leenstra; Nicolas Mäding (DAC, 2008)

Test Set Stripping Limiting the Maximum Number of Specified Bits. - Michael A. Kochte; Christian G. Zoellin; Michael E. Imhof; Hans-Joachim Wunderlich (DELTA, 2008)

Selective Hardening in Early Design Steps. - Christian G. Zoellin; Hans-Joachim Wunderlich; Ilia Polian; Bernd Becker 001 (ETS, 2008)

Integrating Scan Design and Soft Error Correction in Low-Power Applications. - Michael E. Imhof; Hans-Joachim Wunderlich; Christian G. Zoellin (IOLTS, 2008)

Test exploration and validation using transaction level models. - Michael A. Kochte; Christian G. Zoellin; Michael E. Imhof; Rauf Salimi Khaligh; Martin Radetzki; Hans-Joachim Wunderlich; Stefano Di Carlo; Paolo Prinetto (DATE, 2009)

Concurrent Self-Test with Partially Specified Patterns for Low Test Latency and Overhead. - Michael A. Kochte; Christian G. Zoellin; Hans-Joachim Wunderlich (ETS, 2009)

Efficient Simulation of Structural Faults for the Reliability Evaluation at System-Level. - Michael A. Kochte; Christian G. Zoellin; Rafal Baranowski; Michael E. Imhof; Hans-Joachim Wunderlich; Nadereh Hatami; Stefano Di Carlo; Paolo Prinetto (Asian Test Symposium, 2010)

Efficient fault simulation on many-core processors. - Michael A. Kochte; Marcel Schaal; Hans-Joachim Wunderlich; Christian G. Zoellin (DAC, 2010)

System reliability evaluation using concurrent multi-level simulation of structural faults. - Michael A. Kochte; Christian G. Zoellin; Rafal Baranowski; Michael E. Imhof; Hans-Joachim Wunderlich; Nadereh Hatami; Stefano Di Carlo; Paolo Prinetto (ITC, 2010)

Low-power test planning for arbitrary at-speed delay-test clock schemes. - Christian G. Zoellin; Hans-Joachim Wunderlich (VTS, 2010)

Efficient Concurrent Self-Test with Partially Specified Patterns. - Michael A. Kochte; Christian G. Zoellin; Hans-Joachim Wunderlich (J. Electron. Test., 2010)

Efficient multi-level fault simulation of HW/SW systems for structural faults. - Rafal Baranowski; Stefano Di Carlo; Nadereh Hatami; Michael E. Imhof; Michael A. Kochte; Paolo Prinetto; Hans-Joachim Wunderlich; Christian G. Zoellin (Sci. China Inf. Sci., 2011)

Test planning for low-power built-in self test. - Christian G. Zöllin (2015)

Static netlist verification for IBM high-frequency processors using a tree-grammar. - Christoph Jäschke; Ulla Herter; Claudia Wolkober; Carsten Schmitt; Christian G. Zoellin (DATE, 2017)

IBM z14™: 14nm microprocessor for the next-generation mainframe. - Christopher J. Berry; James D. Warnock; John Isakson; John Badar; Brian Bell 001; Frank Malgioglio; Guenter Mayer; Dina Hamid; Jesse Surprise; David Wolpert 001; Ofer Geva; Bill Huott; et al. (ISSCC, 2018)

Enabling pervasive encryption through IBM Z stack innovations. - Michael Jordan 003; Nicholas P. Sardino; Meghan McGrath; Christian G. Zoellin; Thomas E. Morris; Cecilia Carranza Lewis; Greg Vance; Bruce Naylor; Jim Pickel; M. Sueli Almeida; Dave Wierbowski; Chris Meyer; et al. (IBM J. Res. Dev., 2018)

New database compression assists in the IBM z14 processor. - Christian G. Zoellin; Oliver Draese; Jonathan D. Bradbury; Christian Jacobi 002; Aditya Puranik; Peter Sutton; Robert Tokumaru (IBM J. Res. Dev., 2018)

Energy Efficiency Boost in the AI-Infused POWER10 Processor. - Brian W. Thompto; Dung Q. Nguyen; José E. Moreira; Ramon Bertran; Hans M. Jacobson; Richard J. Eickemeyer; Rahul M. Rao; Michael Goulet; Marcy Byers; Christopher J. Gonzalez; Karthik Swaminathan; Nagu R. Dhanwada; et al. (ISCA, 2021)

The IBM Telum II Processor. - Christopher J. Berry; Michael J. Becht; Tim E. Bubb; Howard Haynie; Robert J. Sonnelitter; Katie Seggerman; Jonathan Hsieh; Edward Malley; Mike Cadigan; Susan M. Eickhoff; Matthias Klein; Craig R. Walters; et al. (IEEE Micro, 2025)