Aspects of systems and circuits for nanoelectronics. - Karl F. Goser; Christian Pacha; Andreas Kanstein; Markus L. Rossmann (Proc. IEEE, 1997)

Parameter Determination for Nano-Scale Modelling. - Marc Thomas 001; Christian Pacha; Karl Goser (Fuzzy Days, 1999)

Resonant Tunneling Transistors for Threshold Logic Circuit Applications. - Christian Pacha; Peter Glösekötter; Karl Goser; Uwe Auer; Werner Prost; Franz-Josef Tegude (Great Lakes Symposium on VLSI, 1999)

Digital Circuit Design Based on the Resonant-Tunneling-Hetero-Junction-Bipolar-Transistor. - Peter Glösekötter; Christian Pacha; Karl F. Goser; Gilson I. Wirth; Werner Prost; Uwe Auer; M. Agethen; P. Velling; Franz-Josef Tegude (SBCCI, 2000)

Manufacturability and robust design of nanoelectronic logic circuits based on resonant tunnelling diodes. - Werner Prost; Uwe Auer; Franz-Josef Tegude; Christian Pacha; Karl F. Goser; Guido Janssen; T. van der Roer (Int. J. Circuit Theory Appl., 2000)

Threshold logic circuit design of parallel adders using resonant tunneling devices. - Christian Pacha; Uwe Auer; Christian Burwick; Peter Glösekötter; Andreas Brennemann; Werner Prost; Franz-Josef Tegude; Karl F. Goser (IEEE Trans. Very Large Scale Integr. Syst., 2000)

Tunnelling Diode Technology. - Werner Prost; Uwe Auer; Franz-Josef Tegude; Christian Pacha; Karl Goser; Rainer Duschl; K. Eberl; O. Schmidt (ISMVL, 2001)

Experimental threshold logic implementations based on resonant tunnelling diodes. - Werner Prost; Samuel O. Kim; Peter Glösekötter; Christian Pacha; Holger van Husen; Thorsten Reimann; Karl F. Goser; Franz-Josef Tegude (ICECS, 2002)

Asynchronous Circuit Design Based on the RTBT Monostable-Bistable Logic Transition Element (MOBILE). - Peter Glösekötter; Christian Pacha; Karl F. Goser; Werner Prost; Samuel O. Kim; Holger van Husen; Thorsten Reimann; Franz-Josef Tegude (SBCCI, 2002)

Circuit and application aspects of tunnelling devices in a MOBILE configuration. - Peter Glösekötter; Christian Pacha; Karl F. Goser; Werner Prost; Samuel O. Kim; Holger van Husen; Thorsten Reimann; Franz-Josef Tegude (Int. J. Circuit Theory Appl., 2003)

Dynamic state-retention flip flop for fine-grained sleep-transistor scheme. - Stephan Henzler; Thomas Nirschi; Christian Pacha; Peter Spindler; Philip Teichmann; Michael Fulde; Jürgen Fischer; Matthias Eireiner; Thomas Fischer; Georg Georgakos; Jörg Berthold; Doris Schmitt-Landsiedel (ESSCIRC, 2005)

Efficiency of body biasing in 90-nm CMOS for low-power digital circuits. - Klaus von Arnim; Eduardo Borinski; Peter Seegebrecht; Horst Fiedler; Ralf Brederlow; Roland Thewes; Jörg Berthold; Christian Pacha (IEEE J. Solid State Circuits, 2005)

A 90nm CMOS low-power GSM/EDGE multimedia-enhanced baseband processor with 380MHz ARM9 and mixed-signal extensions. - Thomas Lüftner; Jörg Berthold; Christian Pacha; Georg Georgakos; Guillaume Sauzon; Olaf Hömke; Jurij Beshenar; Peter Mahrla; Knut M. Just; Peter Hober; Stephan Henzler; Doris Schmitt-Landsiedel; et al. (ISSCC, 2006)

Circuit design issues in multi-gate FET CMOS technologies. - Christian Pacha; Klaus von Arnim; Thomas Schulz; Weize Xiong; Michael Gostkowski; Gerhard Knoblinger; Andrew Marshall; Thomas Nirschl; Jörg Berthold; Christian Russ; Harald Gossner; Charvaka Duvvury; et al. (ISSCC, 2006)

Dynamic state-retention flip-flop for fine-grained power gating with small design and power overhead. - Stephan Henzler; Georg Georgakos; Matthias Eireiner; Thomas Nirschl; Christian Pacha; Jörg Berthold; Doris Schmitt-Landsiedel (IEEE J. Solid State Circuits, 2006)

Layout options for stability tuning of SRAM cells in multi-gate-FET technologies. - Florian Bauer; Klaus von Arnim; Christian Pacha; Thomas Schulz; Michael Fulde; Axel Nackaerts; M. Jurczak; Wade Xiong; K. T. San; C. Rinn Cleavelin; Klaus Schruefer; Georg Georgakos; et al. (ESSCIRC, 2007)

Performance improvement of embedded low-power microprocessor cores by selective flip flop replacement. - Thomas Baumann; Jörg Berthold; T. Niedermeier; Tim Schoenauer; J. Dienstuhl; Doris Schmitt-Landsiedel; Christian Pacha (ESSCIRC, 2007)

Efficiency of low-power design techniques in Multi-Gate FET CMOS Circuits. - Christian Pacha; Klaus von Arnim; Florian Bauer; Thomas Schulz; Wade Xiong; K. T. San; Andrew Marshall; Thomas Baumann; C. Rinn Cleavelin; Klaus Schruefer; Jörg Berthold (ESSCIRC, 2007)

Advances in Multi-Gate MOSFET Circuit Design. - Michael Fulde; Klaus von Arnim; Christian Pacha; Florian Bauer; Christian Russ; Domagoj Siprak; Wade Xiong; Andrew Marshall; C. Rinn Cleavelin; Klaus Schruefer; Doris Schmitt-Landsiedel; Gerhard Knoblinger (ICECS, 2007)

A merged MuGFET and planar SOI process. - Andrew Marshall; C. Rinn Cleavelin; Weize Xiong; Christian Pacha; Gerhard Knoblinger; Klaus Von Armin; Thomas Schulz; Klaus Schruefer; Ken Matthews; Wolfgang Molzer; Paul Patruno; Christian Russ (SoCC, 2007)

Statistical analysis of systematic and random variability of flip-flop race immunity in 130nm and 90nm CMOS technologies. - Gustavo Neuberger; Fernanda Gusmão de Lima Kastensmidt; Ricardo Reis 001; Gilson I. Wirth; Ralf Brederlow; Christian Pacha (VLSI-SoC, 2007)

A 90-nm CMOS Low-Power GSM/EDGE Multimedia-Enhanced Baseband Processor With 380-MHz ARM926 Core and Mixed-Signal Extensions. - Thomas Lüftner; Jörg Berthold; Christian Pacha; Georg Georgakos; Guillaume Sauzon; Olaf Hömke; Jurij Beshenar; Peter Mahrla; Knut M. Just; Peter Hober; Stephan Henzler; Doris Schmitt-Landsiedel; et al. (IEEE J. Solid State Circuits, 2007)

Architectural assessment of design techniques to improve speed and robustness in embedded microprocessors. - Thomas Baumann; Doris Schmitt-Landsiedel; Christian Pacha (DAC, 2009)

Thermal issues in test: An overview of the significant aspects and industrial practice. - Juergen Alt; Paolo Bernardi; Alberto Bosio; Riccardo Cantoro; Hans G. Kerkhoff; Andreas Leininger; Wolfgang Molzer; Alessandro Motta; Christian Pacha; Alberto Pagani; Alireza Rohani; R. Strasser (VTS, 2016)