Fitness inheritance in evolutionary and multi-objective high-level synthesis. - Christian Pilato; Gianluca Palermo; Antonino Tumeo; Fabrizio Ferrandi; Donatella Sciuto; Pier Luca Lanzi (IEEE Congress on Evolutionary Computation, 2007)

An Evolutionary Approach to Area-Time Optimization of FPGA designs. - Fabrizio Ferrandi; Pier Luca Lanzi; Gianluca Palermo; Christian Pilato; Donatella Sciuto; Antonino Tumeo (ICSAMOS, 2007)

High-level synthesis with multi-objective genetic algorithm: A comparative encoding analysis. - Christian Pilato; Daniele Loiacono; Fabrizio Ferrandi; Pier Luca Lanzi; Donatella Sciuto (IEEE Congress on Evolutionary Computation, 2008)

A Multi-objective Genetic Algorithm for Design Space Exploration in High-Level Synthesis. - Fabrizio Ferrandi; Pier Luca Lanzi; Daniele Loiacono; Christian Pilato; Donatella Sciuto (ISVLSI, 2008)

Ant colony optimization for mapping and scheduling in heterogeneous multiprocessor systems. - Antonino Tumeo; Christian Pilato; Fabrizio Ferrandi; Donatella Sciuto; Pier Luca Lanzi (ICSAMOS, 2008)

Improving evolutionary exploration to area-time optimization of FPGA designs. - Christian Pilato; Antonino Tumeo; Gianluca Palermo; Fabrizio Ferrandi; Pier Luca Lanzi; Donatella Sciuto (J. Syst. Archit., 2008)

Mapping pipelined applications onto heterogeneous embedded systems: a bayesian optimization algorithm based approach. - Antonino Tumeo; Marco Branca; Lorenzo Camerini; Christian Pilato; Pier Luca Lanzi; Fabrizio Ferrandi; Donatella Sciuto (CODES+ISSS, 2009)

HW/SW methodologies for synchronization in FPGA multiprocessors. - Antonino Tumeo; Christian Pilato; Gianluca Palermo; Fabrizio Ferrandi; Donatella Sciuto (FPGA, 2009)

Evolutionary algorithms for the mapping of pipelined applications onto heterogeneous embedded systems. - Marco Branca; Lorenzo Camerini; Fabrizio Ferrandi; Pier Luca Lanzi; Christian Pilato; Donatella Sciuto; Antonino Tumeo (GECCO, 2009)

Performance modeling of parallel applications on MPSoCs. - Marco Lattuada 001; Christian Pilato; Antonino Tumeo; Fabrizio Ferrandi (SoC, 2009)

Performance estimation for task graphs combining sequential path profiling and control dependence regions. - Fabrizio Ferrandi; Marco Lattuada 001; Christian Pilato; Antonino Tumeo (MEMOCODE, 2009)

Mapping and scheduling of parallel C applications with ant colony optimization onto heterogeneous reconfigurable MPSoCs. - Fabrizio Ferrandi; Christian Pilato; Donatella Sciuto; Antonino Tumeo (ASP-DAC, 2010)

A Fast Heuristic for Extending Standard Cell Libraries with Regular Macro Cells. - Christian Pilato; Fabrizio Ferrandi; Davide Pandini (ISVLSI, 2010)

HArtes: Hardware-Software Codesign for Heterogeneous Multicore Platforms. - Koen Bertels; Vlad Mihai Sima; Yana Yankova; Georgi Kuzmanov; Wayne Luk; José Gabriel F. Coutinho; Fabrizio Ferrandi; Christian Pilato; Marco Lattuada 001; Donatella Sciuto; Andrea Michelotti (IEEE Micro, 2010)

Ant Colony Heuristic for Mapping and Scheduling Tasks and Communications on Heterogeneous Embedded Systems. - Fabrizio Ferrandi; Pier Luca Lanzi; Christian Pilato; Donatella Sciuto; Antonino Tumeo (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010)

Design methodologies for improving embedded systems with hardware accelerators. - Christian Pilato (2010)

A runtime adaptive controller for supporting hardware components with variable latency. - Christian Pilato; Vito Giovanni Castellana; Silvia Lovergine; Fabrizio Ferrandi (AHS, 2011)

SYNAPTIC Project: Regularity Applied to Enhance Manufacturability and Yield at Several Abstraction Levels. - Martin Elhøj; André Inácio Reis; Renato P. Ribas; Fabrizio Ferrandi; Christian Pilato; Francesc Moll; Miguel Miranda; Petr Dobrovolný; Nigel Woolaway; Arnaud Grasset; Philippe Bonnot 001; Giuseppe Desoli; et al. (ARCS Workshops, 2011)

Evaluating Static CMOS Complex Cells in Technology Mapping. - Christian Pilato; Fabrizio Ferrandi; Davide Pandini (ARCS Workshops, 2011)

A design methodology to implement memory accesses in high-level synthesis. - Christian Pilato; Fabrizio Ferrandi; Donatella Sciuto (CODES+ISSS, 2011)

Combined architecture and hardening techniques exploration for reliable embedded system design. - Cristiana Bolchini; Antonio Miele; Christian Pilato (ACM Great Lakes Symposium on VLSI, 2011)

A design methodology for the automatic sizing of standard-cell libraries. - Christian Pilato; Fabrizio Ferrandi; Davide Pandini (ACM Great Lakes Symposium on VLSI, 2011)

Novel Design Methods and a Tool Flow for Unleashing Dynamic Reconfiguration. - Kyprianos Papadimitriou; Christian Pilato; Dionisios N. Pnevmatikatos; Marco D. Santambrogio; Catalin Bogdan Ciobanu; Tim Todman; Tobias Becker; Tom Davidson; Xinyu Niu; Georgi Gaydadjiev; Wayne Luk; Dirk Stroobandt (CSE, 2012)

On the Development of a Runtime Reconfigurable Multicore System-on-Chip. - Andrea Cazzaniga; Gianluca Durelli; Christian Pilato; Donatella Sciuto; Marco D. Santambrogio (DSD, 2012)

FASTER: Facilitating Analysis and Synthesis Technologies for Effective Reconfiguration. - Dionisios N. Pnevmatikatos; Tobias Becker; Andreas Brokalakis; Karel Bruneel; Georgi Gaydadjiev; Wayne Luk; Kyprianos Papadimitriou; Ioannis Papaefstathiou; Oliver Pell; Christian Pilato; M. Robart; Marco D. Santambrogio; et al. (DSD, 2012)

An open-source design and validation platform for reconfigurable systems. - Alessandra Bonetto; Andrea Cazzaniga; Gianluca Durelli; Christian Pilato; Donatella Sciuto; Marco D. Santambrogio (FPL, 2012)

On the automatic integration of hardware accelerators into FPGA-based embedded systems. - Christian Pilato; Andrea Cazzaniga; Gianluca Durelli; Andrés Otero; Donatella Sciuto; Marco D. Santambrogio (FPL, 2012)

An automated framework for the simulation of mapping solutions on heterogeneous MPSoCs. - Antonio Miele; Christian Pilato; Donatella Sciuto (ISSoC, 2012)

Automatic run-time manager generation for reconfigurable MPSoC architectures. - Gianluca Durelli; Christian Pilato; Andrea Cazzaniga; Donatella Sciuto; Marco D. Santambrogio (ReCoSoC, 2012)

Smart technologies for effective reconfiguration: The FASTER approach. - Marco D. Santambrogio; Dionisios N. Pnevmatikatos; Kyprianos Papadimitriou; Christian Pilato; Georgi Gaydadjiev; Dirk Stroobandt; Tom Davidson; Tobias Becker; Tim Todman; Wayne Luk; Alessandra Bonetto; Andrea Cazzaniga; et al. (ReCoSoC, 2012)

TaBit: A framework for task graph to bitstream generation. - Alessandra Bonetto; Andrea Cazzaniga; Gianluca Durelli; Christian Pilato; Donatella Sciuto; Marco D. Santambrogio (ICSAMOS, 2012)

Runtime adaptation on dataflow HPC platforms. - Riccardo Cattaneo; Christian Pilato; Matteo Mastinu; Oliver Kadlcek; Oliver Pell; Marco Domenico Santambrogio (AHS, 2013)

Ant Colony Optimization for mapping, scheduling and placing in reconfigurable systems. - Fabrizio Ferrandi; Pier Luca Lanzi; Christian Pilato; Donatella Sciuto; Antonino Tumeo (AHS, 2013)

A2B: An integrated framework for designing heterogeneous and reconfigurable systems. - Christian Pilato; Riccardo Cattaneo; Gianluca Durelli; Alessandro Antonio Nacci; Marco Domenico Santambrogio; Donatella Sciuto (AHS, 2013)

Bambu: A modular framework for the high level synthesis of memory-intensive applications. - Christian Pilato; Fabrizio Ferrandi (FPL, 2013)

The FASTER vision for designing dynamically reconfigurable systems. - Marco D. Santambrogio; Christian Pilato; Dionisios N. Pnevmatikatos; Kyprianos Papadimitriou; Dirk Stroobandt; Donatella Sciuto (ICICDT, 2013)

A Flexible Interconnection Structure for Reconfigurable FPGA Dataflow Applications. - Gianluca Durelli; Alessandro Antonio Nacci; Riccardo Cattaneo; Christian Pilato; Donatella Sciuto; Marco D. Santambrogio (IPDPS Workshops, 2013)

D-RECS: A complete methodology to implement Self Dynamic Reconfigurable FPGA-based systems. - Fabio Cancare; Christian Pilato; Andrea Cazzaniga; Donatella Sciuto; Marco D. Santambrogio (ReCoSoC, 2013)

A framework for effective exploitation of partial reconfiguration in dataflow computing. - Riccardo Cattaneo; Xinyu Niu; Christian Pilato; Tobias Becker; Wayne Luk; Marco D. Santambrogio (ReCoSoC, 2013)

SMASH: A heuristic methodology for designing partially reconfigurable MPSoCs. - Riccardo Cattaneo; Christian Pilato; Gianluca Durelli; Marco Domenico Santambrogio; Donatella Sciuto (RSP, 2013)

Dataflow computing with Polymorphic Registers. - Catalin Bogdan Ciobanu; Georgi Gaydadjiev; Christian Pilato; Donatella Sciuto (ICSAMOS, 2013)

A Simulation-Based Framework for the Exploration of Mapping Solutions on Heterogeneous MPSoCs. - Antonio Miele; Christian Pilato; Donatella Sciuto (Int. J. Embed. Real Time Commun. Syst., 2013)

Effective Reconfigurable Design: The FASTER Approach. - Dionisios N. Pnevmatikatos; Tobias Becker; Andreas Brokalakis; Georgi Nedeltchev Gaydadjiev; Wayne Luk; Kyprianos Papadimitriou; Ioannis Papaefstathiou; Danilo Pau; Oliver Pell; Christian Pilato; Marco D. Santambrogio; Donatella Sciuto; et al. (ARC, 2014)

System-level memory optimization for high-level synthesis of component-based SoCs. - Christian Pilato; Paolo Mantovani; Giuseppe Di Guglielmo; Luca P. Carloni (CODES+ISSS, 2014)

A Design Methodology for Compositional High-Level Synthesis of Communication-Centric SoCs. - Giuseppe Di Guglielmo; Christian Pilato; Luca P. Carloni (DAC, 2014)

PaRA-Sched: A Reconfiguration-Aware Scheduler for Reconfigurable Architectures. - Riccardo Cattaneo; Riccardo Bellini; Gianluca Durelli; Christian Pilato; Marco D. Santambrogio; Donatella Sciuto (IPDPS Workshops, 2014)

Adaptive Raytracing Implementation Using Partial Dynamic Reconfiguration. - Gianluca Durelli; Fabrizio Spada; Riccardo Cattaneo; Christian Pilato; Danilo Pau; Marco D. Santambrogio (IPDPS Workshops, 2014)

A SystemC-based framework for the simulation of appliances networks in energy-aware smart spaces. - A. A. Nacci; Giovanni Bettinazzi; Christian Pilato; Vincenzo Rana; Marco D. Santambrogio; Donatella Sciuto (WF-IoT, 2014)

FASTER: Facilitating Analysis and Synthesis Technologies for Effective Reconfiguration. - Dionisios N. Pnevmatikatos; Kyprianos Papadimitriou; Tobias Becker; Peter Böhm; Andreas Brokalakis; Karel Bruneel; Catalin Bogdan Ciobanu; Tom Davidson; Georgi Gaydadjiev; Karel Heyse; Wayne Luk; Xinyu Niu; et al. (Microprocess. Microsystems, 2015)

Handling large data sets for high-performance embedded applications in heterogeneous systems-on-chip. - Paolo Mantovani; Emilio G. Cota; Christian Pilato; Giuseppe Di Guglielmo; Luca P. Carloni (CASES, 2016)

On the design of scalable and reusable accelerators for big data applications. - Christian Pilato; Qirui Xu; Paolo Mantovani; Giuseppe Di Guglielmo; Luca P. Carloni (Conf. Computing Frontiers, 2016)

An FPGA-based infrastructure for fine-grained DVFS analysis in high-performance embedded systems. - Paolo Mantovani; Emilio G. Cota; Kevin Tien; Christian Pilato; Giuseppe Di Guglielmo; Kenneth L. Shepard; Luca P. Carloni (DAC, 2016)

Scala-Based Domain-Specific Language for Creating Accelerator-Based SoCs. - Gianluca C. Durelli; Fabrizio Spada; Christian Pilato; Marco D. Santambrogio (IPDPS Workshops, 2016)

Performance Estimation of Task Graphs Based on Path Profiling. - Marco Lattuada 001; Christian Pilato; Fabrizio Ferrandi (Int. J. Parallel Program., 2016)

A Survey and Evaluation of FPGA High-Level Synthesis Tools. - Razvan Nane; Vlad Mihai Sima; Christian Pilato; Jongsok Choi; Blair Fort; Andrew Canis; Yu Ting Chen; Hsuan Hsiao; Stephen Brown 003; Fabrizio Ferrandi; Jason Helge Anderson; Koen Bertels (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016)

Editorial: Special Issue on Innovative Design Methods for Smart Embedded Systems. - Sara Vinco; Christian Pilato (ACM Trans. Embed. Comput. Syst., 2016)

Bridging the Gap Between Software and Hardware Designers Using High-Level Synthesis. - Christian Pilato (PARCO, 2017)

System-Level Optimization of Accelerator Local Memory for Heterogeneous Systems-on-Chip. - Christian Pilato; Paolo Mantovani; Giuseppe Di Guglielmo; Luca P. Carloni (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017)

DarkMem: Fine-grained power management of local memories for accelerators in embedded systems. - Christian Pilato; Luca P. Carloni (ASP-DAC, 2018)

TAO: techniques for algorithm-level obfuscation during high-level synthesis. - Christian Pilato; Francesco Regazzoni 001; Ramesh Karri; Siddharth Garg (DAC, 2018)

Enabling Automated Bug Detection for IP-Based Designs Using High-Level Synthesis. - Pietro Fezzardi; Fabrizio Ferrandi; Christian Pilato (IEEE Des. Test, 2018)

Securing Hardware Accelerators: A New Challenge for High-Level Synthesis. - Christian Pilato; Siddharth Garg; Kaijie Wu 001; Ramesh Karri; Francesco Regazzoni 001 (IEEE Embed. Syst. Lett., 2018)

The Case for Polymorphic Registers in Dataflow Computing. - Catalin Bogdan Ciobanu; Georgi Gaydadjiev; Christian Pilato; Donatella Sciuto (Int. J. Parallel Program., 2018)

High-Level Synthesis of Benevolent Trojans. - Christian Pilato; Kanad Basu; Mohammed Shayan; Francesco Regazzoni 001; Ramesh Karri (DATE, 2019)

TaintHLS: High-Level Synthesis for Dynamic Information Flow Tracking. - Christian Pilato; Kaijie Wu 001; Siddharth Garg; Ramesh Karri; Francesco Regazzoni 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019)

CAD-Base: An Attack Vector into the Electronics Supply Chain. - Kanad Basu; Samah Mohamed Saeed; Christian Pilato; Mohammed Ashraf; Mohammed Thari Nabeel; Krishnendu Chakrabarty; Ramesh Karri (ACM Trans. Design Autom. Electr. Syst., 2019)

Black-Hat High-Level Synthesis: Myth or Reality? - Christian Pilato; Kanad Basu; Francesco Regazzoni 001; Ramesh Karri (IEEE Trans. Very Large Scale Integr. Syst., 2019)

Is Register Transfer Level Locking Secure? - Chandan Karfa; Ramanuj Chouksey; Christian Pilato; Siddharth Garg; Ramesh Karri (DATE, 2020)

Agile SoC Development with Open ESP : Invited Paper. - Paolo Mantovani; Davide Giri; Giuseppe Di Guglielmo; Luca Piccolboni; Joseph Zuckerman; Emilio G. Cota; Michele Petracca; Christian Pilato; Luca P. Carloni (ICCAD, 2020)

Agile SoC Development with Open ESP. - Paolo Mantovani; Davide Giri; Giuseppe Di Guglielmo; Luca Piccolboni; Joseph Zuckerman; Emilio G. Cota; Michele Petracca; Christian Pilato; Luca P. Carloni (CoRR, 2020)

From Domain-Specific Languages to Memory-Optimized Accelerators for Fluid Dynamics. - Karl F. A. Friebel; Stephanie Soldavini; Gerald Hempel; Christian Pilato; Jerónimo Castrillón (CLUSTER, 2021)

Invited: Bambu: an Open-Source Research Framework for the High-Level Synthesis of Complex Applications. - Fabrizio Ferrandi; Vito Giovanni Castellana; Serena Curzel; Pietro Fezzardi; Michele Fiorito; Marco Lattuada 001; Marco Minutoli; Christian Pilato; Antonino Tumeo (DAC, 2021)

Fortifying RTL Locking Against Oracle-Less (Untrusted Foundry) and Oracle-Guided Attacks. - Nimisha Limaye; Animesh Basak Chowdhury; Christian Pilato; Mohammed Thari Nabeel; Ozgur Sinanoglu; Siddharth Garg; Ramesh Karri (DAC, 2021)

Opportunistic IP Birthmarking using Side Effects of Code Transformations on High-Level Synthesis. - Hannah Badier; Christian Pilato; Jean-Christophe Le Lann; Philippe Coussy; Guy Gogniat (DATE, 2021)

EVEREST: A design environment for extreme-scale big data analytics on heterogeneous platforms. - Christian Pilato; Stanislav Böhm; Fabien Brocheton; Jerónimo Castrillón; Riccardo Cevasco; Vojtech Cima; Radim Cmar; Dionysios Diamantopoulos; Fabrizio Ferrandi; Jan Martinovic; Gianluca Palermo; Michele Paolino; et al. (DATE, 2021)

Vertical IP Protection of the Next-Generation Devices: Quo Vadis? - Shubham Rai; Siddharth Garg; Christian Pilato; Vladimir Herdt; Elmira Moussavi; Dominik Sisejkovic; Ramesh Karri; Rolf Drechsler; Farhad Merchant; Akash Kumar 001 (DATE, 2021)

Exploring eFPGA-based Redaction for IP Protection. - Jitendra Bhandari; Abdul Khader Thalakkattu Moosa; Benjamin Tan 001; Christian Pilato; Ganesh Gore; Xifan Tang; Scott Temple; Pierre-Emmanuel Gaillardon; Ramesh Karri (ICCAD, 2021)

High-Level Synthesis of Security Properties via Software-Level Abstractions. - Christian Pilato; Francesco Regazzoni 001 (CoRR, 2021)

Compiler Infrastructure for Specializing Domain-Specific Memory Templates. - Stephanie Soldavini; Christian Pilato (CoRR, 2021)

On the Optimization of Behavioral Logic Locking for High-Level Synthesis. - Christian Pilato; Luca Collini; Luca Cassano; Donatella Sciuto; Siddharth Garg; Ramesh Karri (CoRR, 2021)

A Survey on Domain-Specific Memory Architectures. - Stephanie Soldavini; Christian Pilato (CoRR, 2021)

Automatic Generation of Heterogeneous SoC Architectures With Secure Communications. - Mattia Tibaldi; Christian Pilato; Fabrizio Ferrandi (IEEE Embed. Syst. Lett., 2021)

CICERO: A Domain-Specific Architecture for Efficient Regular Expression Matching. - Daniele Parravicini; Davide Conficconi; Emanuele Del Sozzo; Christian Pilato; Marco D. Santambrogio (ACM Trans. Embed. Comput. Syst., 2021)

ASSURE: RTL Locking Against an Untrusted Foundry. - Christian Pilato; Animesh Basak Chowdhury; Donatella Sciuto; Siddharth Garg; Ramesh Karri (IEEE Trans. Very Large Scale Integr. Syst., 2021)

Protecting Hardware IP Cores During High-Level Synthesis. - Christian Pilato; Donatella Sciuto; Francesco Regazzoni 001; Siddharth Garg; Ramesh Karri (Behavioral Synthesis for Hardware Security, 2022)

High-level design methods for hardware security: is it the right choice? invited. - Christian Pilato; Donatella Sciuto; Benjamin Tan 001; Siddharth Garg; Ramesh Karri (DAC, 2022)

Designing ML-resilient locking at register-transfer level. - Dominik Sisejkovic; Luca Collini; Benjamin Tan 001; Christian Pilato; Ramesh Karri; Rainer Leupers (DAC, 2022)

ALICE: an automatic design flow for eFPGA redaction. - Chiara Muscari Tomajoli; Luca Collini; Jitendra Bhandari; Abdul Khader Thalakkattu Moosa; Benjamin Tan 001; Xifan Tang; Pierre-Emmanuel Gaillardon; Ramesh Karri; Christian Pilato (DAC, 2022)

A Composable Design Space Exploration Framework to Optimize Behavioral Locking. - Luca Collini; Ramesh Karri; Christian Pilato (DATE, 2022)

Reconfigurable Logic for Hardware IP Protection: Opportunities and Challenges. - Luca Collini; Benjamin Tan 001; Christian Pilato; Ramesh Karri (ICCAD, 2022)

HOLL: Program Synthesis for Higher Order Logic Locking. - Gourav Takhar; Ramesh Karri; Christian Pilato; Subhajit Roy 001 (TACAS (1), 2022)

HOLL: Program Synthesis for Higher OrderLogic Locking. - Gourav Takhar; Ramesh Karri; Christian Pilato; Subhajit Roy 001 (CoRR, 2022)

Introduction to the Special Section on High-level Synthesis for FPGA: Next-generation Technologies and Applications. - Christian Pilato; Zhenman Fang; Yuko Hara-Azumi; Jim Hwang (ACM Trans. Design Autom. Electr. Syst., 2022)

Iris: Automatic Generation of Efficient Data Layouts for High Bandwidth Utilization. - Stephanie Soldavini; Donatella Sciuto; Christian Pilato (ASP-DAC, 2023)

Towards High-Level Synthesis of Quantum Circuits. - Chao Lu; Christian Pilato; Kanad Basu (DATE, 2023)

Platform-Aware FPGA System Architecture Generation based on MLIR. - Stephanie Soldavini; Christian Pilato (CoRR, 2023)

CPS Workshop 2023 Proceedings. - Christian Pilato; Francesca Palumbo (CoRR, 2023)

A Survey of FPGA Optimization Methods for Data Center Energy Efficiency. - Mattia Tibaldi; Christian Pilato (IEEE Trans. Sustain. Comput., 2023)

Optimizing the Use of Behavioral Locking for High-Level Synthesis. - Christian Pilato; Luca Collini; Luca Cassano; Donatella Sciuto; Siddharth Garg; Ramesh Karri (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

Automatic Creation of High-bandwidth Memory Architectures from Domain-specific Languages: The Case of Computational Fluid Dynamics. - Stephanie Soldavini; Karl F. A. Friebel; Mattia Tibaldi; Gerald Hempel; Jerónimo Castrillón; Christian Pilato (ACM Trans. Reconfigurable Technol. Syst., 2023)

Generating Posit-Based Accelerators With High-Level Synthesis. - Raul Murillo 001; Alberto A. Del Barrio; Guillermo Botella; Christian Pilato (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

Not All Fabrics Are Created Equal: Exploring eFPGA Parameters for IP Redaction. - Jitendra Bhandari; Abdul Khader Thalakkattu Moosa; Benjamin Tan 001; Christian Pilato; Ganesh Gore; Xifan Tang; Scott Temple; Pierre-Emmanuel Gaillardon; Ramesh Karri (IEEE Trans. Very Large Scale Integr. Syst., 2023)

A System Development Kit for Big Data Applications on FPGA-based Clusters: The EVEREST Approach. - Christian Pilato; Subhadeep Banik; Jakub Beránek; Fabien Brocheton; Jerónimo Castrillón; Riccardo Cevasco; Radim Cmar; Serena Curzel; Fabrizio Ferrandi; Karl F. A. Friebel; Antonella Galizia; Matteo Grasso; et al. (DATE, 2024)

Etna: MLIR-Based System-Level Design and Optimization for Transparent Application Execution on CPU-FPGA Nodes. - Stephanie Soldavini; Felix Suchert; Serena Curzel; Michele Fiorito; Karl F. A. Friebel; Fabrizio Ferrandi; Radim Cmar; Jerónimo Castrillón; Christian Pilato (FCCM, 2024)

Foundation Models in Augmentative and Alternative Communication: Opportunities and Challenges. - Ambra Di Paola; Serena Muraro; Roberto Marinelli; Christian Pilato (CoRR, 2024)

Using Static Analysis for Enhancing HLS Security. - Luca Collini; Joey Ah-kiow; Christian Pilato; Ramesh Karri; Benjamin Tan 001 (IEEE Embed. Syst. Lett., 2024)

QHLS: An HLS Framework to Convert High-Level Descriptions to Quantum Circuits. - Chao Lu; Christian Pilato; Kanad Basu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

The Impact of Logic Locking on Confidentiality: An Automated Evaluation. - Lennart M. Reimann; Evgenii Rezunov; Dominik Germek; Luca Collini; Christian Pilato; Ramesh Karri; Rainer Leupers (ISQED, 2025)

Amethyst: Reducing Data Center Emissions With Dynamic Autotuning and VM Management. - Mattia Tibaldi; Christian Pilato (IEEE Comput. Archit. Lett., 2025)

ARIANNA: An Automatic Design Flow for Fabric Customization and eFPGA Redaction. - Luca Collini; Jitendra Bhandari; Chiara Muscari Tomajoli; Abdul Khader Thalakkattu Moosa; Benjamin Tan 001; Xifan Tang; Pierre-Emmanuel Gaillardon; Ramesh Karri; Christian Pilato (CoRR, 2025)

ARIANNA: An Automatic Design Flow for Fabric Customization and eFPGA Redaction. - Luca Collini; Jitendra Bhandari; Chiara Muscari Tomajoli; Abdul Moosa; Benjamin Tan 001; Xifan Tang; Pierre-Emmanuel Gaillardon; Ramesh Karri; Christian Pilato (ACM Trans. Design Autom. Electr. Syst., 2025)