Entwurfsmethode für selbstgetaktete VLSI-Datenpfadarchitekturen. - Christoph Heer (Shaker, 1995)

Design and architecture of the MPEG-4 video rendering co-processor 'TANGRAM'. - Christoph Heer; Carolina Miro; Anne Lafage; Mladen Berekovic; Giovanni Ghigo; Thorsten Selinger; Kai-Immo Wels (ICECS, 1999)

Architecture of an Image Rendering Co-Processor for MPEG-4 Systems. - Mladen Berekovic; Peter Pirsch; Thorsten Selinger; Kai-Immo Wels; Carolina Miro; Anne Lafage; Christoph Heer; Giovanni Ghigo (ASAP, 2000)

Co-processor architecture for MPEG-4 main profile visual compositing. - Mladen Berekovic; Peter Pirsch; Thorsten Selinger; Kai-Immo Wels; Carolina Miro; Anne Lafage; Christoph Heer; Giovanni Ghigo (ISCAS, 2000)

Coprocessor architecture for MPEG-4 video object rendering. - Christoph Heer; Carolina Miro; Anne Lafage; Mladen Berekovic; Giovanni Ghigo; Thorsten Selinger; Kai-Immo Wels (VCIP, 2000)

Self-routing crossbar switch with internal contention resolution. - Christoph Heer; Andreas Kirstädter; Christian Sauer 001 (ICECS, 2001)

Architecture of an Image Rendering Co-Processor for MPEG-4 Visual Compositing. - Mladen Berekovic; Peter Pirsch; Thorsten Selinger; Kai-Immo Wels; Carolina Miro; Anne Lafage; Christoph Heer; Giovanni Ghigo (J. VLSI Signal Process., 2002)

An ultra low-power adiabatic adder embedded in a standard 0.13μm CMOS environment. - Ettore Amirante; Jürgen Fischer; Markus Lang; Agnese Bargagli-Stoffi; Jörg Berthold; Christoph Heer; Doris Schmitt-Landsiedel (ESSCIRC, 2003)

Investigations on a new high resolution wide swath SAR concept. - Christoph Heer; Francis Soualle; Rolf Zahn; Rolf Reber (IGARSS, 2003)

Reduced Leverage of Dual Supply voltages in Ultra Deep Submicron Technologies. - Tim Schoenauer; Jörg Berthold; Christoph Heer (PATMOS, 2003)

Ultra-Low-Power Design: Device and Logic Design Approaches. - Christoph Heer; Ulf Schlichtmann (Ultra Low-Power Electronics and Design, 2004)

Extremely Low-Power Logic. - Christian Piguet; Jacques Gautier; Christoph Heer; Ian O'Connor; Ulf Schlichtmann (DATE, 2004)

A scalable compact architecture for the computation of integer binary logarithms through linear approximation. - Christophe Layer; Hans-Jörg Pfleiderer; Christoph Heer (ISCAS (2), 2004)

Moonrake chip - GALS demonstrator in 40 nm CMOS technology. - Milos Krstic; Xin Fan 003; Eckhard Grass; Christoph Heer; Birgit Sanders; Luca Benini; Mohammad Reza Kakoee; Alessandro Strano; Davide Bertozzi (SoC, 2011)

Exploring pausible clocking based GALS design for 40-nm system integration. - Xin Fan 003; Milos Krstic; Eckhard Grass; Birgit Sanders; Christoph Heer (DATE, 2012)

Evaluation of GALS Methods in Scaled CMOS Technology: Moonrake Chip Experience. - Milos Krstic; Xin Fan 003; Eckhard Grass; Luca Benini; Mohammad Reza Kakoee; Christoph Heer; Birgit Sanders; Alessandro Strano; Davide Bertozzi (Int. J. Embed. Real Time Commun. Syst., 2012)

Verification of scan-on-receive beamforming for X-Band HRWS applications. - Grzegorz Adamiuk; Thomas Fügen; Christian Fischer 004; Bernhard Grafmueller; Friedhelm Rostan; Christoph Heer (IGARSS, 2016)

The Biomass SAR Instrument: Development Status and Performance Overview. - Thomas Fügen; Eckhardt Sperlich; Christoph Heer; Sebastian Riegger; Carl Warren; Adriano Carbone; Florence Hélière (IGARSS, 2018)

In-Flight Calibration of the Metop-Sg Sca Wind Scatterometer. - Friedhelm Rostan; Dieter Ulrich; Eberhard Schied; Christoph Heer; Allan Østergaard (IGARSS, 2018)

The Metop-Sg Sca wind Scatterometer: Cdr Development Status and Performance Overview. - Friedhelm Rostan; Dieter Ulrich; Christoph Heer; Allan Østergaard (IGARSS, 2019)