Towards Purposeful Design Space Exploration of Heterogeneous CGRAs: Clock Frequency Estimation. - Dennis Leander Wolf; Christoph Spang 001; Christian Hochberger (DAC, 2020)

RT-LIFE: Portable RISC-V Interface for Real-Time Lightweight Security Enforcement. - Christoph Spang 001; Florian Meisel; Andreas Koch 001 (SAMOS, 2021)

IPEC: Open-Source Design Automation for Inter-Processing Element Communication. - David Volz; Christoph Spang 001; Andreas Koch 001 (ARC, 2022)

SCAIE-V: an open-source SCAlable interface for ISA extensions for RISC-V processors. - Mihaela Damian; Julian Oppermann; Christoph Spang 001; Andreas Koch 001 (DAC, 2022)

DExIE - An IoT-Class Hardware Monitor for Real-Time Fine-Grained Control-Flow Integrity. - Christoph Spang 001; Yannick Lavan; Marco Hartmann; Florian Meisel; Andreas Koch 001 (J. Signal Process. Syst., 2022)

TaPaFuzz - An FPGA-Accelerated Framework for RISC-V IoT Graybox Fuzzing. - Florian Meisel; David Volz; Christoph Spang 001; Dat Tran; Andreas Koch 001 (DASIP, 2023)

PQC-HA: A Framework for Prototyping and In-Hardware Evaluation of Post-Quantum Cryptography Hardware Accelerators. - Richard Sattel; Christoph Spang 001; Carsten Heinz; Andreas Koch 001 (CoRR, 2023)

Advantages of a Statistical Estimation Approach for Clock Frequency Estimation of Heterogeneous and Irregular CGRAs. - Dennis Leander Wolf; Christoph Spang 001; Daniel Diener; Christian Hochberger (ACM Trans. Reconfigurable Technol. Syst., 2023)

TaPaFuzz: Hardware-accelerated RISC-V bare-metal firmware fuzzing using rapid job launches. - Florian Meisel; Christoph Spang 001; David Volz; Andreas Koch 001 (J. Syst. Archit., 2024)