Architectural Synthesis with Interconnection Cost Control. - Christophe Jégo; Emmanuel Casseau; Eric Martin 001 (VLSI, 1999)

Architectural synthesis of digital signal processing applications dedicated to submicron technologies. - Emmanuel Casseau; Christophe Jégo; Eric Martin 001 (ICECS, 2001)

Reed-Solomon behavioral virtual component for communication systems. - Emmanuel Casseau; Bertrand Le Gal; Christophe Jégo; Nathalie Le Heno; Eric Martin 001 (ISCAS (4), 2004)

Synthèse architecturale d'applications temps réel pour technologies submicroniques. - Emmanuel Casseau; Christophe Jégo; Eric Martin 001 (Tech. Sci. Informatiques, 2004)

Hardware Virtual Components Compliant with Communication System Standards. - Nabil Abdelli; Pierre Bomel; Emmanuel Casseau; Anne-Marie Fouilliart; Christophe Jégo; Philippe Kajfasz; Bertrand Le Gal; Nathalie Le Heno (DSD, 2005)

Abstract Synthesis of Turbo Decoder Elements onto Reconfigurable Circuit. - Caaliph Andriamisaina; Catherine Dezan; Christophe Jégo; Bernard Pottier (ERSA, 2005)

C-based rapid prototyping for digital signal processing. - Emmanuel Casseau; Bertrand Le Gal; Pierre Bomel; Christophe Jégo; Sylvain Huet; Eric Martin 001 (EUSIPCO, 2005)

Reduced Complexity Iterative Multi-User Detector for IDMA (Interleave-Division Multiple Access) System. - Irene Masinjara Mahafeno; Charlotte Langlais; Christophe Jégo (GLOBECOM, 2006)

The Case Study of Block Turbo Decoders on a Framework for Portable Synthesis on FPGA. - Catherine Dezan; Christophe Jégo; Bernard Pottier; Christophe Gouyen; Loïc Lagadec (HICSS, 2006)

Efficient architecture for Reed Solomon block turbo code. - Erwan Piriou; Christophe Jégo; Patrick Adde; Raphaël Le Bidan; Michel Jézéquel (ISCAS, 2006)

A Flexible Architecture For Block Turbo Decoders Using BCH Or Reed-Solomon Components Codes. - Erwan Piriou; Christophe Jégo; Patrick Adde; Michel Jézéquel (ISVLSI, 2006)

Design, Implementation and Prototyping of a Flexible Architecture Dedicated to Block Turbo Decoding. - Erwan Piriou; Christophe Jégo; Patrick Adde; Michel Jézéquel (ReCoSoC, 2006)

Towards Gb/s turbo decoding of product code onto an FPGA device. - Camille Leroux; Christophe Jégo; Patrick Adde; Michel Jézéquel (ISCAS, 2007)

Turbo Decoding of Product Codes based on the Modified Adaptive Belief Propagation Algorithm. - Christophe Jégo; Warren J. Gross (ISIT, 2007)

Energy Efficient Turbo Decoder with Reduced State Metric Quantization. - Haisheng Liu; Jean-Philippe Diguet; Christophe Jégo; Michel Jézéquel; Emmanuel Boutillon (SiPS, 2007)

Architecture de turbo-décodeur en blocs entièrement parallèle pour la transmission de données au-delà du Gbit/s. - Christophe Jégo; Patrick Adde; Camille Leroux (Ann. des Télécommunications, 2007)

On the higher efficiency of parallel Reed-Solomon turbo-decoding. - Camille Leroux; Christophe Jégo; Patrick Adde; Michel Jézéquel (ICECS, 2008)

A highly parallel Turbo Product Code decoder without interleaving resource. - Camille Leroux; Christophe Jégo; Patrick Adde; Michel Jézéquel; Deepak Gupta (SiPS, 2008)

Reed-Solomon Turbo Product Codes for Optical Communications: From Code Optimization to Decoder Design. - Raphaël Le Bidan; Camille Leroux; Christophe Jégo; Patrick Adde; Ramesh Pyndiah (EURASIP J. Wirel. Commun. Netw., 2008)

Stochastic Decoding of Linear Block Codes With High-Density Parity-Check Matrices. - Saeed Sharifi Tehrani; Christophe Jégo; Bo Zhu; Warren J. Gross (IEEE Trans. Signal Process., 2008)

FPGA Prototyping Approach for the Validation of Efficient Iterative Decoders in Digital Communication Systems. - Christophe Jégo (ERSA, 2009)

Blind Frame Synchronization of Product Codes Based on the Adaptation of the Parity Check Matrix. - Rodrigue Imad; Sébastien Houcke; Christophe Jégo (ICC, 2009)

Design of an Iterative Receiver for Linearly Precoded MIMO Systems. - Daoud Karakolah; Christophe Jégo; Charlotte Langlais; Michel Jézéquel (ISCAS, 2009)

Design of rotated QAM mapper/demapper for the DVB-T2 standard. - Meng Li 012; Charbel Abdel Nour; Christophe Jégo; Catherine Douillard (SiPS, 2009)

Turbo decoding of product codes using adaptive belief propagation. - Christophe Jégo; Warren J. Gross (IEEE Trans. Commun., 2009)

High-throughput Block Turbo Decoding: From Full-parallel Architecture to FPGA Prototyping. - Camille Leroux; Christophe Jégo; Patrick Adde; Michel Jézéquel (J. Signal Process. Syst., 2009)

A new single-error correction scheme based on self-diagnosis residue number arithmetic. - Yangyang Tang; Emmanuel Boutillon; Christophe Jégo; Michel Jézéquel (DASIP, 2010)

Design and implementation of a soft-decision decoder for Cortex codes. - Patrick Adde; Christophe Jégo; Raphaël Le Bidan; Jorge Ernesto Pérez Chamorro (ICECS, 2010)

Stochastic Decoding of Turbo Codes. - Quang Trung Dong; Matthieu Arzel; Christophe Jégo; Warren J. Gross (IEEE Trans. Signal Process., 2010)

Assertion support in high-level synthesis design flow. - Aurélien Ribon; Bertrand Le Gal; Christophe Jégo; Dominique Dallet (FDL, 2011)

Efficient iterative receiver for bit-Interleaved Coded Modulation according to the DVB-T2 standard. - Meng Li 012; Charbel Abdel Nour; Christophe Jégo; Jianxiao Yang; Catherine Douillard (ICASSP, 2011)

A shuffled iterative bit-interleaved coded modulation receiver for the DVB-T2 standard: Design, implementation and FPGA prototyping. - Meng Li 012; Charbel Abdel Nour; Christophe Jégo; Jianxiao Yang; Catherine Douillard (SiPS, 2011)

Hardware efficiency versus error probability in unreliable computation. - Yangyang Tang; Emmanuel Boutillon; Christophe Jégo; Michel Jézéquel (SiPS, 2011)

Stochastic Multiple Stream Decoding of Cortex Codes. - Matthieu Arzel; Cyril Lahuec; Christophe Jégo; Warren J. Gross; Yvain Bruned (IEEE Trans. Signal Process., 2011)

Turbo Product Code Decoder Without Interleaving Resource: From Parallelism Exploration to High Efficiency Architecture. - Camille Leroux; Christophe Jégo; Patrick Adde; Deepak Gupta; Michel Jézéquel (J. Signal Process. Syst., 2011)

FPGA prototyping of an ASIP LDPC decoder for the DVB-T2 standard. - Bertrand Le Gal; Christophe Jégo (DASIP, 2012)

An LDPC decoding method for fault-tolerant digital logic. - Yangyang Tang; Chris Winstead; Emmanuel Boutillon; Christophe Jégo; Michel Jézéquel (ISCAS, 2012)

A space-time redundancy technique for embedded stochastic error correction. - Chris Winstead; Yangyang Tang; Emmanuel Boutillon; Christophe Jégo; Michel Jézéquel (ISTC, 2012)

Design of an ASIP LDPC Decoder Compliant with Digital Communication Standards. - Bertrand Le Gal; Christophe Jégo (SiPS, 2012)

A Dedicated Approach to Explore Design Space for Hardware Architecture of Turbo Decoders. - Oscar Sanchez; Michel Jézéquel; Saeed-ur Rehman; Awais Sani; Cyrille Chavet; Philippe Coussy; Christophe Jégo (SiPS, 2012)

A contribution to the reduction of the dynamic power dissipation in the turbo decoder. - Haisheng Liu; Christophe Jégo; Emmanuel Boutillon; Michel Jézéquel; Jean-Philippe Diguet (Ann. des Télécommunications, 2012)

Design of an Efficient Maximum Likelihood Soft Decoder for Systematic Short Block Codes. - Patrick Adde; Daniel Gomez Toro; Christophe Jégo (IEEE Trans. Signal Process., 2012)

Welcome to the 2013 conference on design and architectures for signal and image processing (DASIP) in Cagliari, Italy. - Paolo Meloni; Christophe Jégo (DASIP, 2013)

Muller C-element based Decoder (MCD): A decoder against transient faults. - Yangyang Tang; Emmanuel Boutillon; Chris Winstead; Christophe Jégo; Michel Jézéquel (ISCAS, 2013)

Partial sums generation architecture for successive cancellation decoding of polar codes. - Guillaume Berhault; Camille Leroux; Christophe Jégo; Dominique Dallet (SiPS, 2013)

Softcore Processor Optimization According to Real-Application Requirements. - Bertrand Le Gal; Christophe Jégo (IEEE Embed. Syst. Lett., 2013)

Analysis of the Convergence Process by EXIT Charts for Parallel Implementations of Turbo Decoders. - Oscar Sanchez; Christophe Jégo; Michel Jézéquel (IEEE Commun. Lett., 2013)

Méthodologie d'optimisation des processeurs embarqués. Une approche favorisant la réduction de la surface et de la consommation des processeurs embarqués. - Bertrand Le Gal; Christophe Jégo (Tech. Sci. Informatiques, 2013)

Low-complexity layered BP-based detection and decoding for a NB-LDPC coded MIMO system. - Ali Haroun; Charbel Abdel Nour; Matthieu Arzel; Christophe Jégo (ICC, 2014)

Low-complexity LDPC-coded iterative MIMO receiver based on belief propagation algorithm for detection. - Ali Haroun; Charbel Abdel Nour; Matthieu Arzel; Christophe Jégo (ISTC, 2014)

Software polar decoder on an embedded processor. - Bertrand Le Gal; Camille Leroux; Christophe Jégo (SiPS, 2014)

Symbol-based BP detection for MIMO systems associated with non-binary LDPC codes. - Ali Haroun; Charbel Abdel Nour; Matthieu Arzel; Christophe Jégo (WCNC, 2014)

A High Throughput Efficient Approach for Decoding LDPC Codes onto GPU Devices. - Bertrand Le Gal; Christophe Jégo; Jérémie Crenne (IEEE Embed. Syst. Lett., 2014)

GPU-like on-chip system for decoding LDPC codes. - Bertrand Le Gal; Christophe Jégo (ACM Trans. Embed. Comput. Syst., 2014)

A Flexible NISC-Based LDPC Decoder. - Bertrand Le Gal; Christophe Jégo; Camille Leroux (IEEE Trans. Signal Process., 2014)

Hardware implementation of a soft cancellation decoder for polar codes. - Guillaume Berhault; Camille Leroux; Christophe Jégo; Dominique Dallet (DASIP, 2015)

Analysis of ADMM-LP algorithm for LDPC decoding, a first step to hardware implementation. - Imen Debbabi; Bertrand Le Gal; Nadia Khouja; Fethi Tlili; Christophe Jégo (ICECS, 2015)

Partial sums computation in polar codes decoding. - Guillaume Berhault; Camille Leroux; Christophe Jégo; Dominique Dallet (ISCAS, 2015)

High-Throughput LDPC Decoder on Low-Power Embedded Processors. - Bertrand Le Gal; Christophe Jégo (IEEE Commun. Lett., 2015)

Multi-Gb/s Software Decoding of Polar Codes. - Bertrand Le Gal; Camille Leroux; Christophe Jégo (IEEE Trans. Signal Process., 2015)

Hardware architecture for lowering the error floor of LTE turbo codes. - Thibaud Tonnellier; Camille Leroux; Bertrand Le Gal; Christophe Jégo; Benjamin Gadat; Nicolas Van Wambeke (DASIP, 2016)

Multicore implementation of LDPC decoders based on ADMM algorithm. - Imen Debbabi; Nadia Khouja; Fethi Tlili; Bertrand Le Gal; Christophe Jégo (ICASSP, 2016)

Memory reduction techniques for successive cancellation decoding of polar codes. - Bertrand Le Gal; Camille Leroux; Christophe Jégo (ICASSP, 2016)

A scalable 3-phase polar decoder. - Bertrand Le Gal; Camille Leroux; Christophe Jégo (ISCAS, 2016)

Comparison of different schedulings for the ADMM based LDPC decoding. - Imen Debbabi; Bertrand Le Gal; Nadia Khouja; Fethi Tlili; Christophe Jégo (ISTC, 2016)

Lowering the error floor of double-binary turbo codes: The flip and check algorithm. - Thibaud Tonnellier; Camille Leroux; Bertrand Le Gal; Christophe Jégo; Benjamin Gadat; Nicolas Van Wambeke (ISTC, 2016)

Evaluation of the hardware complexity of the ADMM approach for LDPC decoding. - Imen Debbabi; Nadia Khouja; Fethi Tlili; Bertrand Le Gal; Christophe Jégo (WCNC, 2016)

Fast Converging ADMM-Penalized Algorithm for LDPC Decoding. - Imen Debbabi; Bertrand Le Gal; Nadia Khouja; Fethi Tlili; Christophe Jégo (IEEE Commun. Lett., 2016)

Low-Complexity Soft Detection of QAM Demapper for a MIMO System. - Ali Haroun; Charbel Abdel Nour; Matthieu Arzel; Christophe Jégo (IEEE Commun. Lett., 2016)

High-Throughput Multi-Core LDPC Decoders Based on x86 Processor. - Bertrand Le Gal; Christophe Jégo (IEEE Trans. Parallel Distributed Syst., 2016)

Real Time LP Decoding of LDPC Codes for High Correction Performance Applications. - Imen Debbabi; Bertrand Le Gal; Nadia Khouja; Fethi Tlili; Christophe Jégo (IEEE Wirel. Commun. Lett., 2016)

Lowering the Error Floor of Turbo Codes With CRC Verification. - Thibaud Tonnellier; Camille Leroux; Bertrand Le Gal; Benjamin Gadat; Christophe Jégo; Nicolas Van Wambeke (IEEE Wirel. Commun. Lett., 2016)

An LP-based algorithm for decoding terminated LDPC convolutional codes. - Hayfa Ben Thameur; Nadia Khouja; Fethi Tlili; Bertrand Le Gal; Christophe Jégo (IINTEC, 2017)

A survey on decoding schedules of LDPC convolutional codes and associated hardware architectures. - Hayfa Ben Thameur; Bertrand Le Gal; Nadia Khouja; Fethi Tlili; Christophe Jégo (ISCC, 2017)

Improving performance of SCMA MPA decoders using estimation of conditional probabilities. - Alireza Ghaffari; Mathieu Léonardon; Yvon Savaria; Christophe Jégo; Camille Leroux (NEWCAS, 2017)

Low-latency software LDPC decoders for x86 multi-core devices. - Bertrand Le Gal; Christophe Jégo (SiPS, 2017)

Successive cancellation decoder for very long polar codes. - Bertrand Le Gal; Camille Leroux; Christophe Jégo (SiPS, 2017)

Reduced complexity ADMM-based schedules for LP decoding of LDPC convolutional codes. - Hayfa Ben Thameur; Bertrand Le Gal; Nadia Khouja; Fethi Tlili; Christophe Jégo (SiPS, 2017)

Low complexity ADMM-LP based decoding strategy for LDPC convolutional codes. - Hayfa Ben Thameur; Bertrand Le Gal; Nadia Khouja; Fethi Tlili; Christophe Jégo (SoftCOM, 2017)

Memory Requirement Reduction Method for Successive Cancellation Decoding of Polar Codes. - Guillaume Berhault; Camille Leroux; Christophe Jégo; Dominique Dallet (J. Signal Process. Syst., 2017)

From multicore LDPC decoder implementations to FPGA decoder architectures: a case study. - Yann Delomier; Bertrand Le Gal; Jérémie Crenne; Christophe Jégo (ICECS, 2018)

Fast Design of Reliable, Flexible and High-Speed AWGN architectures with High Level Synthesis. - Yann Delomier; Bertrand Le Gal; Jérémie Crenne; Christophe Jégo (ICECS, 2018)

Hardware design of Euclidean Projection modules for ADMM LDPC decoding. - Hayfa Ben Thameur; Bertrand Le Gal; Nadia Khouja; Fethi Tlili; Christophe Jégo (ICECS, 2018)

Custom Low Power Processor for Polar Decoding. - Mathieu Léonardon; Camille Leroux; David Binet; J. M. Pierre Langlois; Christophe Jégo; Yvon Savaria (ISCAS, 2018)

Model-based Design of Efficient LDPC Decoder Architectures. - Yann Delomier; Bertrand Le Gal; Jérémie Crenne; Christophe Jégo (ISTC, 2018)

Transport Triggered Polar Decoders. - Mathieu Léonardon; Camille Leroux; Pekka Jääskeläinen; Christophe Jégo; Yvon Savaria (ISTC, 2018)

High data rate and flexible hardware QC-LDPC decoder for satellite optical communications. - Vincent Pignoly; Bertrand Le Gal; Christophe Jégo; Benjamin Gadat (ISTC, 2018)

MIPP: a Portable C++ SIMD Wrapper and its use for Error Correction Coding in 5G Standard. - Adrien Cassagne; Olivier Aumage; Denis Barthou; Camille Leroux; Christophe Jégo (WPMVP@PPoPP, 2018)

ADMM hardware decoder for regular LDPC codes using a NISC-based architecture. - Imen Debbabi; Bertrand Le Gal; Nadia Khouja; Fethi Tlili; Christophe Jégo (WCNC, 2018)

Implementation aspects of a pipeline ADMM-based LP decoding of LDPC convolutional codes. - Hayfa Ben Thameur; Bertrand Le Gal; Nadia Khouja; Fethi Tlili; Christophe Jégo (WCNC, 2018)

High-performance software implementations of SCAN decoder for polar codes. - Bertrand Le Gal; Camille Leroux; Christophe Jégo (Ann. des Télécommunications, 2018)

Multicore and Manycore Implementations of ADMM-based Decoders for LDPC Decoding. - Imen Debbabi; Bertrand Le Gal; Nadia Khouja; Fethi Tlili; Christophe Jégo (J. Signal Process. Syst., 2018)

Precision Agriculture for Small to Medium Size Farmers - An IoT Approach. - Victor Grimblatt; Guillaume Ferré; Francois Rivet; Christophe Jégo; Nicolas Vergara (ISCAS, 2019)

Generation of Efficient Self-adaptive Hardware Polar Decoders Using High-Level Synthesis. - Yann Delomier; Bertrand Le Gal; Jérémie Crenne; Christophe Jégo (SiPS, 2019)

AFF3CT: A Fast Forward Error Correction Toolbox! - Adrien Cassagne; Olivier Hartmann; Mathieu Léonardon; Kun He; Camille Leroux; Romain Tajan; Olivier Aumage; Denis Barthou; Thibaud Tonnellier; Vincent Pignoly; Bertrand Le Gal; Christophe Jégo (SoftwareX, 2019)

Fast and Flexible Software Polar List Decoders. - Mathieu Léonardon; Adrien Cassagne; Camille Leroux; Christophe Jégo; Louis-Philippe Hamelin; Yvon Savaria (J. Signal Process. Syst., 2019)

Fair comparison of hardware and software LDPC decoder implementations for SDR space links. - Vincent Pignoly; Bertrand Le Gal; Christophe Jégo; Benjamin Gadat; Lyonel Barthe (ICECS, 2020)

High speed LDPC decoding for optical space link. - Vincent Pignoly; Bertrand Le Gal; Christophe Jégo; Benjamin Gadat; Lyonel Barthe (ICECS, 2020)

Low-Latency Sorter Architecture for Polar Codes Successive-Cancellation-List Decoding. - Bertrand Le Gal; Yann Delomier; Camille Leroux; Christophe Jégo (SiPS, 2020)

Low-latency and high-throughput software turbo decoders on multi-core architectures. - Bertrand Le Gal; Christophe Jégo (Ann. des Télécommunications, 2020)

Model-based Design of Hardware SC Polar Decoders for FPGAs. - Yann Delomier; Bertrand Le Gal; Jérémie Crenne; Christophe Jégo (ACM Trans. Reconfigurable Technol. Syst., 2020)

Model-Based Design of Flexible and Efficient LDPC Decoders on FPGA Devices. - Yann Delomier; Bertrand Le Gal; Jérémie Crenne; Christophe Jégo (J. Signal Process. Syst., 2020)

High-Throughput FFT-SPA Decoder Implementation for Non-Binary LDPC Codes on x86 Multicore Processors. - Bertrand Le Gal; Christophe Jégo (J. Signal Process. Syst., 2020)

A Flexible and Portable Real-time DVB-S2 Transceiver using Multicore and SIMD CPUs. - Adrien Cassagne; Mathieu Léonardon; Romain Tajan; Camille Leroux; Christophe Jégo; Olivier Aumage; Denis Barthou (ISTC, 2021)

Tailored List Decoding of Polar Codes. - Malek Ellouze; Camille Leroux; Romain Tajan; Charly Poulliat; Christophe Jégo (ISTC, 2021)

An Energy Efficient and Scalable Node Architecture for Sensor Network. - Yassine Faize; Jérémie Crenne; Nicolas Hanusse; Christophe Jégo (NEWCAS, 2021)

How to Feed a Growing Population - An IoT Approach to Crop Health and Growth. - Victor Grimblatt; Christophe Jégo; Guillaume Ferré; Francois Rivet (IEEE J. Emerg. Sel. Topics Circuits Syst., 2021)

High-Performance Gallager-E Decoders for Hard Input LDPC Decoding on Multi-core Devices. - Bertrand Le Gal; Vincent Pignoly; Christophe Jégo (DASIP, 2022)

High-throughput FFT architectures using HLS tools. - Hugues Almorin; Bertrand Le Gal; Jérémie Crenne; Christophe Jégo; Vincent Kissel (ICECS 2022, 2022)

An IoT SoC for Agricultural Applications. - Victor Grimblatt; Guillaume Ferré; Francois Rivet; Christophe Jégo (LASCAS, 2022)

Methodology to Adapt Neural Network on Constrained Device at Topology level. - Logan Saint-Germain; Bertrand Le Gal; Fabien Baldacci; Jérémie Crenne; Christophe Jégo; Sebastien Loty (SiPS, 2022)

A novel JFG detection-decoding approach of a vertical shuffle scheduling for iterative MIMO receivers with NB-LDPC codes. - Ali Haroun; Ali Chamas Al Ghouwayel; Hussein Hijazi; Christophe Jégo (Signal Process., 2022)

Model Based Design of FMCW Radar Processing Systems on FPGA Platforms. - Hugues Almorin; Bertrand Le Gal; Christophe Jégo; Vincent Kissel (DSD, 2023)

Implementation of an Assignment Algorithm for Object Tracking on a FPGA MPSoC. - Denis Shemonaev; Bertrand Le Gal; Christophe Jégo; Anthony Besseau (DSD, 2023)

Design and Implementation of a RISC-V core with a Flexible Pipeline for Design Space Exploration. - Jonathan Saussereau; Christophe Jégo; Camille Leroux; Jean-Baptiste Bégueret (ICECS, 2023)

AsteRISC: A Size-Optimized RISC-V Core for Design Space Exploration. - Jonathan Saussereau; Camille Leroux; Jean-Baptiste Bégueret; Christophe Jégo (ISCAS, 2023)

Low-Complexity Algorithm for the Minimum Distance Properties of PAC Codes. - Malek Ellouze; Romain Tajan; Camille Leroux; Christophe Jégo; Charly Poulliat (ISTC, 2023)

A DSEL for high throughput and low latency software-defined radio on multicore CPUs. - Adrien Cassagne; Romain Tajan; Olivier Aumage; Camille Leroux; Denis Barthou; Christophe Jégo (Concurr. Comput. Pract. Exp., 2023)

High-performance hard-input LDPC decoding on multi-core devices for optical space links. - Bertrand Le Gal; Christophe Jégo; Vincent Pignoly (J. Syst. Archit., 2023)

Hardware Implementation of Soft Mapper/Demappers in Iterative EP-Based Receivers. - Ian Fischer Schilling; Serdar Sahin; Camille Leroux; Antonio Maria Cipriano; Christophe Jégo (SiPS, 2024)

Computing the Low-Weight codewords of Punctured and Shortened Pre-Transformed polar Codes. - Malek Ellouze; Romain Tajan; Camille Leroux; Christophe Jégo; Charly Poulliat (CoRR, 2024)

Scheduling Strategies for Partially-Replicable Task Chains on Two Types of Resources. - Diane Orhan; Yacine Idouar; Laércio Lima Pilla; Adrien Cassagne; Denis Barthou; Christophe Jégo (IPDPS (Workshops), 2025)

Optimal scheduling algorithms for software-defined radio pipelined and replicated task chains on multicore architectures. - Diane Orhan; Laércio Lima Pilla; Denis Barthou; Adrien Cassagne; Olivier Aumage; Romain Tajan; Christophe Jégo; Camille Leroux (J. Parallel Distributed Comput., 2025)

Odatix: An open-source design automation toolbox for FPGA/ASIC implementation. - Jonathan Saussereau; Christophe Jégo; Camille Leroux; Jean-Baptiste Bégueret (SoftwareX, 2025)