Area and power savings via buffer reorganization in asymmetric 3D-NoCs for heterogeneous 3D-SoCs. - Jan Moritz Joseph; Christopher Blochwitz; Thilo Pionteck; Alberto García Ortiz (NORCAS, 2015)

An architectural template for composing application specific datapaths at runtime. - Rico Backasch; Gerald Hempel; Christopher Blochwitz; Stefan Werner 002; Sven Groppe; Thilo Pionteck (ReConFig, 2015)

An optimized radix-tree for hardware-accelerated dictionary generation for semantic web databases. - Christopher Blochwitz; Jan Moritz Joseph; Rico Backasch; Thilo Pionteck; Stefan Werner 002; Dennis Heinrich; Sven Groppe (ReConFig, 2015)

Hybrid FPGA approach for a B+ tree in a Semantic Web database system. - Dennis Heinrich; Stefan Werner 002; Marc Stelzner; Christopher Blochwitz; Thilo Pionteck; Sven Groppe (ReCoSoC, 2015)

Automated composition and execution of hardware-accelerated operator graphs. - Stefan Werner 002; Dennis Heinrich; Jannik Piper; Sven Groppe; Rico Backasch; Christopher Blochwitz; Thilo Pionteck (ReCoSoC, 2015)

PatTrieSort - External String Sorting based on Patricia Tries. - Sven Groppe; Dennis Heinrich; Stefan Werner 002; Christopher Blochwitz; Thilo Pionteck (Open J. Databases, 2015)

Adaptive allocation of default router paths in Network-on-Chips for latency reduction. - Jan Moritz Joseph; Christopher Blochwitz; Thilo Pionteck (HPCS, 2016)

Hardware-accelerated pose estimation for embedded systems using Vivado HLS. - Jan Moritz Joseph; Tobias Winker; Kristian Ehlers; Christopher Blochwitz; Thilo Pionteck (ReConFig, 2016)

A simulation environment for design space exploration for asymmetric 3D-Network-on-Chip. - Jan Moritz Joseph; Sven Wrieden; Christopher Blochwitz; Alberto García Ortiz; Thilo Pionteck (ReCoSoC, 2016)

Constructing Large-Scale Semantic Web Indices for the Six RDF Collation Orders. - Sven Groppe; Dennis Heinrich; Christopher Blochwitz; Thilo Pionteck (Open J. Big Data, 2016)

Runtime Adaptive Hybrid Query Engine based on FPGAs. - Stefan Werner 002; Dennis Heinrich; Sven Groppe; Christopher Blochwitz; Thilo Pionteck (Open J. Databases, 2016)

Hardware-Accelerated Radix-Tree Based String Sorting for Big Data Applications. - Christopher Blochwitz; Julian Wolff; Jan Moritz Joseph; Stefan Werner 002; Dennis Heinrich; Sven Groppe; Thilo Pionteck (ARCS, 2017)

Continuous live-tracing as debugging approach on FPGAs. - Christopher Blochwitz; Raphael Klink; Jan Moritz Joseph; Thilo Pionteck (ReConFig, 2017)

Design space exploration for a hardware-accelerated embedded real-time pose estimation using vivado HLS. - Jan Moritz Joseph; Morten Mey; Kristian Ehlers; Christopher Blochwitz; Tobias Winker; Thilo Pionteck (ReConFig, 2017)

Area and power savings via asymmetric organization of buffers in 3D-NoCs for heterogeneous 3D-SoCs. - Jan Moritz Joseph; Christopher Blochwitz; Alberto García Ortiz; Thilo Pionteck (Microprocess. Microsystems, 2017)

Hardware-Accelerated Index Construction for Semantic Web. - Christopher Blochwitz; Julian Wolff; Mladen Berekovic; Dennis Heinrich; Sven Groppe; Jan Moritz Joseph; Thilo Pionteck (FPT, 2018)

Hardware-aided update acceleration in a hybrid Semantic Web database system. - Dennis Heinrich; Stefan Werner 002; Christopher Blochwitz; Thilo Pionteck; Sven Groppe (J. Supercomput., 2020)

StreamGrid - An AXI-Stream-Compliant Overlay Architecture. - Christopher Blochwitz; León Philipp; Mladen Berekovic; Thilo Pionteck (ARC, 2021)

A comparative survey of open-source application-class RISC-V processor implementations. - Alexander Dörflinger; Mark Albers; Benedikt Kleinbeck; Yejun Guan; Harald Michalik; Raphael Klink; Christopher Blochwitz; Anouar Nechi; Mladen Berekovic (CF, 2021)

RemEduLa - Remote Education Laboratory for FPGA Design Technology. - Christopher Blochwitz; Philipp Grothe; Sven Dreier; Waiel Aljnabi; Rainer Buchty; Mladen Berekovic (ISCAS, 2022)