Designing efficient residue arithmetic based VLSI correlators. - Aniruddha A. Deodhar; Manish Bhardwaj; Christopher T. Clarke; Thambipillai Srikanthan (ICASSP, 1998)

A Reverse Converter for the 4-moduli Superset {2n-1, 2n, 2n+1, 2n+1+1}. - Manish Bhardwaj; Thambipillai Srikanthan; Christopher T. Clarke (IEEE Symposium on Computer Arithmetic, 1999)

VLSI Costs of Arithmetic Parallelism: A Residue Reverse Conversion Perspectiv. - Manish Bhardwaj; Thambipillai Srikanthan; Christopher T. Clarke (IEEE Symposium on Computer Arithmetic, 1999)

Static Pattern Predictor (SPP) Based Low Power Instruction Cache Design. - Kugan Vivekanandarajah; Thambipillai Srikanthan; Christopher T. Clarke; Saurav Bhattacharyya (Embedded Systems and Applications, 2003)

Elimination of sign precomputation in flat CORDIC. - Suchitra Sathyanarayana; S. Sukthankar; Thambipillai Srikanthan; Christopher T. Clarke (ISCAS (4), 2005)

Profile Directed Instruction Cache Tuning for Embedded Systems. - Kugan Vivekanandarajah; Thambipillai Srikanthan; Christopher T. Clarke (ISVLSI, 2006)

Rapid generation of custom instructions using predefined dataflow structures. - Siew Kei Lam; Thambipillai Srikanthan; Christopher T. Clarke (Microprocess. Microsystems, 2006)

Real Time Tracking of Camera Motion Through Cylindrical Passages. - Suchitra Sathyanarayana; Srikanthan Thambipillai; Christopher T. Clarke (DSP, 2007)

Analogue/digital interface and communications aspects in a multi-channel ENG recording asic. - Christopher T. Clarke; John Taylor 002; Xianhong Xu (ISCAS, 2008)

Selecting Profitable Custom Instructions for Area-Time-Efficient Realization on Reconfigurable Architectures. - Siew Kei Lam; Thambipillai Srikanthan; Christopher T. Clarke (IEEE Trans. Ind. Electron., 2009)

Instruction set customization for area-constrained FPGA designs. - Alok Prakash; Siew Kei Lam; Christopher T. Clarke; Thambipillai Srikanthan (SoCC, 2011)

Architecture-Aware Technique for Mapping Area-Time Efficient Custom Instructions onto FPGAs. - Siew Kei Lam; Thambipillai Srikanthan; Christopher T. Clarke (IEEE Trans. Computers, 2011)

Custom instructions with local memory elements without expensive DMA transfers. - Alok Prakash; Christopher T. Clarke; Thambipillai Srikanthan (FPL, 2012)

Examination of the concept of a row-column separated median filter. - Di Wang; Christopher T. Clarke; A. N. Evans (FPL, 2012)

Modelling communication overhead for accessing local memories in hardware accelerators. - Alok Prakash; Siew Kei Lam; Thambipillai Srikanthan; Christopher T. Clarke (ASAP, 2013)

FPGA-aware techniques for rapid generation of profitable custom instructions. - Alok Prakash; Siew Kei Lam; Christopher T. Clarke; Thambipillai Srikanthan (Microprocess. Microsystems, 2013)

Improved Signal Processing Methods for Velocity Selective Neural Recording Using Multi-Electrode Cuffs. - Assad I. Al-Shueli; Christopher T. Clarke; Nick Donaldson; John Taylor 002 (IEEE Trans. Biomed. Circuits Syst., 2014)

Rapid evaluation of custom instruction selection approaches with FPGA estimation. - Siew Kei Lam; Thambipillai Srikanthan; Christopher T. Clarke (ACM Trans. Embed. Comput. Syst., 2014)

Exploiting FPGA-Aware Merging of Custom Instructions for Runtime Reconfiguration. - Siew Kei Lam; Christopher T. Clarke; Thambipillai Srikanthan (ACM Trans. Reconfigurable Technol. Syst., 2014)

Rapid Memory-Aware Selection of Hardware Accelerators in Programmable SoC Design. - Alok Prakash; Christopher T. Clarke; Siew-Kei Lam; Thambipillai Srikanthan (IEEE Trans. Very Large Scale Integr. Syst., 2018)

Efficient digital implementation of a multi-precision square-root algorithm. - Alexander E. Beasley; Robert J. Watson; Christopher T. Clarke (IET Comput. Digit. Tech., 2019)

An OpenGL Compliant Hardware Implementation of a Graphic Processing Unit Using Field Programmable Gate Array-System on Chip Technology. - Alexander E. Beasley; Christopher T. Clarke; Robert J. Watson (ACM Trans. Reconfigurable Technol. Syst., 2020)