Process models for analyzing associative data structures. - Vladimir Hahanov; Olesya Guz; Ngene Christopher Umerah; Vitaliy Olchovoy (EWDTS, 2010)

Testing and verification of HDL-models for SoC components. - Vladimir Hahanov; Irina V. Hahanova; Ngene Christopher Umerah; Tiecoura Yves (EWDTS, 2010)

A diagnostic model for detecting functional violation in HDL-code of System-on-Chip. - Ngene Christopher Umerah; Vladimir Ivanovich Hahanov (EWDTS, 2011)

Ensuring a High Quality Digital Device through Design for Testability. - Christopher Umerah Ngene (J. Comput. Inf. Technol., 2012)

Synthesis of qubit models for logic circuits. - Wajeb Gharibi; Sergey A. Zaychenko; Farid Dahiri; Yu. V. Hahanova; Olesya Guz; Christopher Umerah Ngene; Adiele Stanley (EWDTS, 2013)

Cloud traffic control system. - Vladimir Ivanovich Hahanov; O. A. Gus; Artur Ziarmand; Ngene Christopher Umerah; A. Arefjev (EWDTS, 2013)