Characteristic measures of switching functions. - Christos A. Papachristou (Inf. Sci., 1977)

An Algorithm for Optimal NAND Cascade Logic Synthesis. - Christos A. Papachristou (IEEE Trans. Computers, 1978)

Algorithms for parallel addition and parallel polynomial evaluation. - Christos A. Papachristou (IEEE Symposium on Computer Arithmetic, 1981)

Hardware microcontrol schemes using PLAs. - Christos A. Papachristou (MICRO, 1981)

A microsequencer architecture with firmware support for modular microprogramming. - Christos A. Papachristou; Satnam Sing Gambhir (MICRO, 1982)

Direct Implementation of Discrete and Residue-Based Functions Via Optimal Encoding: A Programmable Array Logic Approach. - Christos A. Papachristou (IEEE Trans. Computers, 1983)

An automatic migration scheme based on modular microcode and structured firmware sequencing. - Christos A. Papachristou; Venkata R. Immaneni; D. B. Sarma (MICRO, 1984)

Multi - Input residue arithmetic utilizing read - Only associative memory. - Christos A. Papachristou (IEEE Symposium on Computer Arithmetic, 1985)

Microcode development for microprogrammed processors. - Jerry P.-C. Hwang; Christos A. Papachristou; Danny D. Cornett (MICRO, 1985)

An Improved Method for Detecting Functional Faults in Semiconductor Random Access Memories. - Christos A. Papachristou; Narendar B. Sahgal (IEEE Trans. Computers, 1985)

Expert system approach to VLSI cell design (abstract). - Christos A. Papachristou (ACM Conference on Computer Science, 1986)

Data flow graph partitioning to reduce communication cost. - Cris Koutsougeras; Christos A. Papachristou; Ranga Vemuri (MICRO, 1986)

A Systolic Array Structure for Matrix Multiplication in the Residue Number System. - Christos A. Papachristou; Suntae Hwang (ICS, 1987)

Associative table lookup processing for multioperand residue arithmetic. - Christos A. Papachristou (J. ACM, 1987)

Training of a neural network for pattern classification based on an entropy measure. - Cris Koutsougeras; Christos A. Papachristou (ICNN, 1988)

Mapping of micro data flow computations on parallel microarchitectures. - L. Shih; Christos A. Papachristou (MICRO, 1988)

A Coordinated Approach to Partitioning and Test Pattern Generation for Pseudoexhaustive Testing. - Wen-Ben Jone; Christos A. Papachristou (DAC, 1989)

A Scheme for Overlaying Concurrent Testing of VLSI Circuits. - Wen-Ben Jone; Christos A. Papachristou; M. Pereira (DAC, 1989)

On reordering instruction streams for pipelined computers. - Jong-Jiann Shieh; Christos A. Papachristou (MICRO, 1989)

A Linear Program Driven Scheduling and Allocation Method Followed by an Interconnect Optimization Algorithm. - Christos A. Papachristou; Haluk Konuk (DAC, 1990)

Extending Athena: multiple classes and confidence output values. - Cris Koutsougeras; George Georgiou; Christos A. Papachristou (TAI, 1990)

An instruction reoderer for pipelined computers. - Jong-Jiann Shieh; Christos A. Papachristou (MICRO, 1990)

SMDSS - a structured microcode development and simulation system. - Djahida Smati; Jerry P.-C. Hwang; Christos A. Papachristou (MICRO, 1990)

A design scheme for PLA-based control tables with reduced area and time-delay cost. - Christos A. Papachristou; Anil L. Pandya (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1990)

A Design for Testability Scheme with Applications to Data Path Synthesis. - Scott Chiu; Christos A. Papachristou (DAC, 1991)

A Data Path Synthesis Method for Self-Testable Designs. - Christos A. Papachristou; Scott Chiu; Haidar Harmanani (DAC, 1991)

A Built-In Self-Testing Approach for Minimizing Hardware Overhead. - Scott Chiu; Christos A. Papachristou (ICCD, 1991)

SYNTEST: A Method for High-Level SYNthesis with Self-TESTability. - Christos A. Papachristou; Scott Chiu; Haidar Harmanani (ICCD, 1991)

Microcontrol architectures with sequencing firmware and modular microcode development tools. - Christos A. Papachristou; Satnamsingh B. Gambhir (Microprocessing and Microprogramming, 1991)

Move Frame Scheduling and Mixed Scheduling-Allocation for the Automated Synthesis of Digital Systems. - Mehrdad Nourani; Christos A. Papachristou (DAC, 1992)

SYNTEST: an environment for system-level design for test. - Haidar Harmanani; Christos A. Papachristou; Scott Chiu; Mehrdad Nourani (EURO-DAC, 1992)

A neural network based algorithm for the scheduling problem in high-level synthesis. - Mehrdad Nourani; Christos A. Papachristou; Yoshiyasu Takefuji (EURO-DAC, 1992)

ALMP: A Shifting Memory Architecture for Loop Pipelining. - H. Fatih Ugurdag; Christos A. Papachristou (ICCD, 1992)

Y-Pipe: a conditional branching scheme without pipeline delays. - Michael J. Knieser; Christos A. Papachristou (MICRO, 1992)

A Feedforward Neural Network Classifier Model: Multiple Classes, Confidence Output Values, and Implementation. - Cris Koutsougeras; George Georgiou; Christos A. Papachristou (Int. J. Pattern Recognit. Artif. Intell., 1992)

A Layout Estimation Algorithm for RTL Datapaths. - Mehrdad Nourani; Christos A. Papachristou (DAC, 1993)

An Approach for Redesigning in Data Path Synthesis. - Christos A. Papachristou; Haidar Harmanani; Mehrdad Nourani (DAC, 1993)

An improved method for RTL synthesis with testability tradeoffs. - Haidar Harmanani; Christos A. Papachristou (ICCAD, 1993)

A Partial Scan Cost Estimation Method at the System Level. - Scott Chiu; Christos A. Papachristou (ICCD, 1993)

A VLIW architecture based on shifting register files. - H. Fatih Ugurdag; Christos A. Papachristou (MICRO, 1993)

Vertical Migration of Software Functions and Algorithms Using Enhanced Microsequencing. - Christos A. Papachristou; Venkata R. Immaneni (IEEE Trans. Computers, 1993)

Structural constraints for circular self-test paths. - Joan Carletta; Christos A. Papachristou (VTS, 1994)

A method for testability analysis and BIST insertion at the RTL. - Joan Carletta; Christos A. Papachristou (ED&TC, 1995)

Architectural partitioning of control memory for application specific programmable processors. - Wei Zhao; Christos A. Papachristou (ICCAD, 1995)

Testability analysis and insertion for RTL circuits based on pseudorandom BIST. - Joan Carletta; Christos A. Papachristou (ICCD, 1995)

Test Synthesis in the Behavioral Domain. - Christos A. Papachristou; Joan Carletta (ITC, 1995)

A coordinated circuit partitioning and test generation method for pseudo-exhaustive testing of VLSI circuits. - Wen-Ben Jone; Christos A. Papachristou (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995)

BIST Testability Enhancement of System Level Circuits : Experience with An Industrial Design. - Kowen Lai; Christos A. Papachristou (Asian Test Symposium, 1996)

A Register File and Scheduling Model for Application Specific Processor Synthesis. - Ehat Ercanli; Christos A. Papachristou (DAC, 1996)

An Effective Power Management Scheme for RTL Design Based on Multiple Clocks. - Christos A. Papachristou; Mark Spining; Mehrdad Nourani (DAC, 1996)

An evolution programming approach on multiple behaviors for the design of application specific programmable processors. - Wei Zhao; Christos A. Papachristou (ED&TC, 1996)

COMET: a hardware-software codesign methodology. - Michael J. Knieser; Christos A. Papachristou (EURO-DAC, 1996)

False path exclusion in delay analysis of RTL-based datapath-controller designs. - Christos A. Papachristou; Mehrdad Nourani (EURO-DAC, 1996)

Synthesis of reusable DSP cores based on multiple behaviors. - Wei Zhao; Christos A. Papachristou (ICCAD, 1996)

Hardware-Software Co-Design for Test: It's the Last Straw! - J. El-Ziq; Najmi T. Jarwala; Niraj K. Jha; Peter Marwedel; Christos A. Papachristou; Janusz Rajski; John W. Sheppard (VTS, 1996)

BIST testability enhancement using high level test synthesis for behavioral and structural designs. - Kowen Lai; Christos A. Papachristou; Mikhail Baklashov (Asian Test Symposium, 1997)

A Scheme for Integrated Controller-Datapath Fault Testing. - Mehrdad Nourani; Joan Carletta; Christos A. Papachristou (DAC, 1997)

Structural BIST insertion using behavioral test analysis. - Mehrdad Nourani; Christos A. Papachristou (ED&TC, 1997)

A test synthesis technique using redundant register transfers. - Christos A. Papachristou; Mikhail Baklashov (ICCAD, 1997)

High Level Test Synthesis Across the Boundary of Behavioral and Structural Domains. - Kowen Lai; Christos A. Papachristou; Mikhail Baklashov (ICCD, 1997)

Testability Enhancement for Behavioral Descriptions Containing Conditional Statements. - Kelly A. Ockunzzi; Christos A. Papachristou (ITC, 1997)

Behavioral Testability Insertion for Datapath/Controller Circuits. - Joan Carletta; Christos A. Papachristou (J. Electron. Test., 1997)

A Bypass Scheme for Core-Based System Fault Testing. - Mehrdad Nourani; Christos A. Papachristou (DATE, 1998)

Testing DSP Cores Based on Self-Test Programs. - Wei Zhao; Christos A. Papachristou (DATE, 1998)

Parallelism in Structural Fault Testing of Embedded Cores. - Mehrdad Nourani; Christos A. Papachristou (VTS, 1998)

Testability Enhancement for Control-Flow Intensive Behaviors. - Kelly A. Ockunzzi; Christos A. Papachristou (J. Electron. Test., 1998)

High-Level Test Synthesis for Behavioral and Structural Designs. - Christos A. Papachristou; Mikhail Baklashov; Kowen Lai (J. Electron. Test., 1998)

Using codesign techniques to support analog functionality. - Francis G. Wolff; Michael J. Knieser; Daniel J. Weyer; Christos A. Papachristou (CODES, 1999)

Microprocessor Based Testing for Core-Based System on Chip. - Christos A. Papachristou; F. Martin; Mehrdad Nourani (DAC, 1999)

Synthesis of Controllers for Full Testability of Integrated Datapath-Controller Pairs. - Joan Carletta; Mehrdad Nourani; Christos A. Papachristou (DATE, 1999)

A Method of Distributed Controller Design for RTL Circuits. - Christos A. Papachristou; Yusuf Alzazeri (DATE, 1999)

High Time for Higher Level BIST. - Christos A. Papachristou (ITC, 1999)

Instruction Randomization Self Test For Processor Cores. - Ken Batcher; Christos A. Papachristou (VTS, 1999)

Structural Fault Testing of Embedded Cores Using Pipelining. - Mehrdad Nourani; Christos A. Papachristou (J. Electron. Test., 1999)

A multiple clocking scheme for low-power RTL design. - Christos A. Papachristou; Mehrdad Nourani; Mark Spining (IEEE Trans. Very Large Scale Integr. Syst., 1999)

Synthesis-for-testability of controller-datapath pairs that use gated clocks. - Mehrdad Nourani; Joan Carletta; Christos A. Papachristou (DAC, 2000)

Detecting Undetectable Controller Faults Using Power Analysis. - Joan Carletta; Christos A. Papachristou; Mehrdad Nourani (DATE, 2000)

An ILP formulation to optimize test access mechanism in system-on-chip testing. - Mehrdad Nourani; Christos A. Papachristou (ITC, 2000)

Stability-based algorithms for high-level synthesis of digital ASICs. - Mehrdad Nourani; Christos A. Papachristou (IEEE Trans. Very Large Scale Integr. Syst., 2000)

Test Strategies for BIST at the Algorithmic and Register-Transfer Levels. - Kelly A. Ockunzzi; Christos A. Papachristou (DAC, 2001)

Improving Bus Test Via IDDT and Boundary Scan. - Shih-Yu Yang; Christos A. Papachristou; Massood Tabib-Azar (DAC, 2001)

Detection of text strings from mixed text/graphics images. - Chien-Hua Tsai; Christos A. Papachristou (Document Recognition and Retrieval, 2001)

Breaking Correlation to Improve Testability. - Kelly A. Ockunzzi; Christos A. Papachristou (VTS, 2001)

Integrated test of interacting controllers and datapaths. - Mehrdad Nourani; Joan Carletta; Christos A. Papachristou (ACM Trans. Design Autom. Electr. Syst., 2001)

Multiscan-Based Test Compression and Hardware Decompression Using LZ77. - Francis G. Wolff; Christos A. Papachristou (ITC, 2002)

False path exclusion in delay analysis of RTL structures. - Mehrdad Nourani; Christos A. Papachristou (IEEE Trans. Very Large Scale Integr. Syst., 2002)

A Technique for High Ratio LZW Compression. - Michael J. Knieser; Francis G. Wolff; Christos A. Papachristou; Daniel J. Weyer; David R. McIntyre (DATE, 2003)

Designing Self Test Programs for Embedded DSP Cores. - Hani Rizk; Christos A. Papachristou; Francis G. Wolff (DATE, 2004)

Test Compression and Hardware Decompression for Scan-Based SoCs. - Francis G. Wolff; Christos A. Papachristou; David R. McIntyre (DATE, 2004)

A Reconfigurable SoC Architecture and Caching Scheme for 3D Medical Image Processing. - Jianchun Li; Christos A. Papachristou; Raj Shekhar (FCCM, 2004)

A "Brick" Caching Scheme for 3D Medical Imaging. - Jianchun Li; Christos A. Papachristou; Raj Shekhar (ISBI, 2004)

Soft Delay Error Effects in CMOS Combinational Circuits. - Balkaran S. Gill; Christos A. Papachristou; Francis G. Wolff (VTS, 2004)

An Efficient BICS Design for SEUs Detection and Correction in Semiconductor Memories. - Balkaran S. Gill; Michael Nicolaidis; Francis G. Wolff; Christos A. Papachristou; Steven L. Garverick (DATE, 2005)

Accelerating mutual information-based 3D medical image registration with An FPGA computing platform (abstract only). - Jianchun Li; Christos A. Papachristou; Raj Shekhar (FPGA, 2005)

Radiation Induced Single-Word Multiple-Bit Upsets Correction in SRAM. - Balkaran S. Gill; Michael Nicolaidis; Christos A. Papachristou (IOLTS, 2005)

Node sensitivity analysis for soft errors in CMOS logic. - Balkaran S. Gill; Christos A. Papachristou; Francis G. Wolff; Norbert Seifert (ITC, 2005)

A Large Scale Adaptable Multiplier for Cryptographic Applications. - Osama Daifallah Al-Khaleel; Christos A. Papachristou; Francis G. Wolff; Kiamal Z. Pekmestzi (AHS, 2006)

Self-Configurable Neural Network Processor for FIR Filter Applications. - Gorn Tepvorachai; Christos A. Papachristou (AHS, 2006)

Soft delay error analysis in logic circuits. - Balkaran S. Gill; Christos A. Papachristou; Francis G. Wolff (DATE, 2006)

A Dynamic Reconfigurable Fabric for Platform SoCs. - Christos A. Papachristou; J. Weaver; R. Vijayakumar; Francis G. Wolff (FPL, 2006)

FPGA-based Design of a Large Moduli Multiplier for Public Key Cryptographic Systems. - Osama Daifallah Al-Khaleel; Christos A. Papachristou; Francis G. Wolff; Kiamal Z. Pekmestzi (ICCD, 2006)

A Self Test Program Design Technique for Embedded DSP Cores. - Hani Rizk; Christos A. Papachristou; Francis G. Wolff (J. Electron. Test., 2006)

A method for detecting interconnect DSM defects in systems on chip. - Shih-Yu Yang; Christos A. Papachristou (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006)

A Configurable FIR Filter Scheme based on an Adaptive Multilayer Network Structure. - Gorn Tepvorachai; Christos A. Papachristou (AHS, 2007)

Facial Image Associative Memory Model. - Gorn Tepvorachai; Christos A. Papachristou (AHS, 2007)

Interactive presentation: A new asymmetric SRAM cell to reduce soft errors and leakage power in FPGA. - Balkaran S. Gill; Christos A. Papachristou; Francis G. Wolff (DATE, 2007)

An Elliptic Curve Cryptosystem Design Based on FPGA Pipeline Folding. - Osama Daifallah Al-Khaleel; Christos A. Papachristou; Francis G. Wolff; Kiamal Z. Pekmestzi (IOLTS, 2007)

Face Recognition using a Cognitive Processing Model. - Gorn Tepvorachai; Christos A. Papachristou (AHS, 2008)

Towards Trojan-Free Trusted ICs: Problem Analysis and Detection Scheme. - Francis G. Wolff; Christos A. Papachristou; Swarup Bhunia; Rajat Subhra Chakraborty (DATE, 2008)

A high-speed radix-4 multiplexer-based array multiplier. - Dimitris Bekiaris; Kiamal Z. Pekmestzi; Christos A. Papachristou (ACM Great Lakes Symposium on VLSI, 2008)

An Embedded Flash Memory Vault for Software Trojan Protection. - Francis G. Wolff; Christos A. Papachristou (HOST, 2008)

Multi-label imbalanced data enrichment process in neural net classifier training. - Gorn Tepvorachai; Christos A. Papachristou (IJCNN, 2008)

SRAM Cell Design Protected from SEU Upsets. - Yuriy Shiyanovskii; Francis G. Wolff; Christos A. Papachristou (IOLTS, 2008)

An Adaptable Task Manager for Reconfigurable Architecture Kernels. - Yuriy Shiyanovskii; Francis G. Wolff; Christos A. Papachristou; Daniel J. Weyer (AHS, 2009)

MERO: A Statistical Approach for Hardware Trojan Detection. - Rajat Subhra Chakraborty; Francis G. Wolff; Somnath Paul; Christos A. Papachristou; Swarup Bhunia (CHES, 2009)

Avoiding Delay Jitter in Cyber-Physical Systems Using One Way Delay Variations Model. - Huthaifa Al-Omari; Francis G. Wolff; Christos A. Papachristou; David R. McIntyre (CSE (2), 2009)

Dynamic Evaluation of Hardware Trust. - David R. McIntyre; Francis G. Wolff; Christos A. Papachristou; Swarup Bhunia (HOST, 2009)

Efficient architectures for elliptic curve cryptography processors for RFID. - Lawrence Leinweber; Christos A. Papachristou; Francis G. Wolff (ICCD, 2009)

Panel: Realistic low power design: Let errors occur and correct them later or mitigate errors via design guardbanding and process control?. - Abhijit Chatterjee; Jacob A. Abraham; Adit D. Singh; Elie Maricau; Rakesh Kumar 002; Christos A. Papachristou (IOLTS, 2009)

SRAM cell design using tri-state devices for SEU protection. - Yuriy Shiyanovskii; Francis G. Wolff; Christos A. Papachristou (IOLTS, 2009)

An Improved Algorithm to Smooth Delay Jitter in Cyber-Physical Systems. - Huthaifa Al-Omari; Francis G. Wolff; Christos A. Papachristou; David R. McIntyre (ScalCom-EmbeddedCom, 2009)

Hardware Trojan by Hot Carrier Injection - Yuriy Shiyanovskii; Francis G. Wolff; Christos A. Papachristou; Daniel J. Weyer; W. Clay (CoRR, 2009)

Exploiting Semiconductor Properties for Hardware Trojans - Yuriy Shiyanovskii; Francis G. Wolff; Christos A. Papachristou; Daniel J. Weyer; W. Clay (CoRR, 2009)

System level self-healing for parametric yield and reliability improvement under power bound. - Seetharam Narasimhan; Somnath Paul; Rajat Subhra Chakraborty; Francis G. Wolff; Christos A. Papachristou; Daniel J. Weyer; Swarup Bhunia (AHS, 2010)

Process reliability based trojans through NBTI and HCI effects. - Yuriy Shiyanovskii; Francis G. Wolff; Aravind Rajendran; Christos A. Papachristou; Daniel J. Weyer; W. Clay (AHS, 2010)

Embedded system protection from software corruption. - Francis G. Wolff; Christos A. Papachristou; Daniel J. Weyer; W. Clay (AHS, 2010)

Multiple-Parameter Side-Channel Analysis: A Non-invasive Hardware Trojan Detection Approach. - Seetharam Narasimhan; Rajat Subhra Chakraborty; Dongdong Du; Somnath Paul; Francis G. Wolff; Christos A. Papachristou; Kaushik Roy 001; Swarup Bhunia (HOST, 2010)

Trustworthy computing in a multi-core system using distributed scheduling. - David R. McIntyre; Francis G. Wolff; Christos A. Papachristou; Swarup Bhunia (IOLTS, 2010)

An analysis of efficient formulas for elliptic curve point addition over binary extension fields. - Lawrence Leinweber; Christos A. Papachristou; Francis G. Wolff (CISS, 2011)

Fast and compact binary-to-BCD conversion circuits for decimal multiplication. - Osama Daifallah Al-Khaleel; Zakaria Al-Qudah; Mohammad Al-Khaleel; Christos A. Papachristou; Francis G. Wolff (ICCD, 2011)

Fast binary/decimal adder/subtractor with a novel correction-free BCD addition. - Osama Daifallah Al-Khaleel; Mohammad Al-Khaleel; Zakaria Al-Qudah; Christos A. Papachristou; Khaldoon Mhaidat; Francis G. Wolff (ICECS, 2011)

Noise margin, critical charge and power-delay tradeoffs for SRAM design. - Aravind Rajendran; Yuriy Shiyanovskii; Frank Wolff; Christos A. Papachristou (IOLTS, 2011)

A novel radiation tolerant SRAM design based on synergetic functional component separation for nanoscale CMOS. - Yuriy Shiyanovskii; Aravind Rajendran; Christos A. Papachristou (IOLTS, 2011)

Smoothing delay jitter in networked control systems. - Huthaifa Al-Omari; Christos A. Papachristou; Francis G. Wolff; David R. McIntyre (J. Embed. Comput., 2011)

A low power memory cell design for SEU protection against radiation effects. - Yuriy Shiyanovskii; Aravind Rajendran; Christos A. Papachristou (AHS, 2012)

An efficient elliptic curve cryptography processor using addition chains with high information entropy. - Lawrence Leinweber; Christos A. Papachristou; Francis G. Wolff (CCECE, 2012)

Expert System Simulation of Hardware. - Lawrence Leinweber; Bhanu Pratap Singh; Christos A. Papachristou (ICTAI, 2013)

NEFCIS: Neuro-fuzzy Concept Based Inference System for Specification Mining. - Arunprasath Shankar; Bhanu Pratap Singh; Francis G. Wolff; Christos A. Papachristou (ICTAI, 2013)

Knowledge-Guided Methodology for Specification Analysis. - Bhanu Pratap Singh; Arunprasath Shankar; Yuriy Shiyanovskii; Francis G. Wolff; Christos A. Papachristou; Daniel J. Weyer; Steve Clay; Jim Morrison (ICTAI, 2013)

Analytical modeling and numerical simulations of temperature field in TSV-based 3D ICs. - Yuriy Shiyanovskii; Christos A. Papachristou; Cheng-Wen Wu (ISQED, 2013)

High performance FPGA-based decimal-to-binary conversion schemes for decimal arithmetic. - Osama Daifallah Al-Khaleel; Zakaria Al-Qudah; Mohammad Al-Khaleel; Christos A. Papachristou (Microprocess. Microsystems, 2013)

Hardware Trojan Detection by Multiple-Parameter Side-Channel Analysis. - Seetharam Narasimhan; Dongdong Du; Rajat Subhra Chakraborty; Somnath Paul; Francis G. Wolff; Christos A. Papachristou; Kaushik Roy 001; Swarup Bhunia (IEEE Trans. Computers, 2013)

Ontology-guided Conceptual Analysis of Design Specifications. - Arunprasath Shankar; Bhanu Pratap Singh; Francis G. Wolff; Christos A. Papachristou (DAC, 2014)

Cross-correlation of specification and RTL for soft IP analysis. - Bhanu Pratap Singh; Arunprasath Shankar; Francis G. Wolff; Christos A. Papachristou; Daniel J. Weyer; Steve Clay (DATE, 2014)

Knowledge-Guided Methodology for Third-Party Soft IP Analysis. - Bhanu Pratap Singh; Arunprasath Shankar; Francis G. Wolff; Daniel J. Weyer; Christos A. Papachristou; Bhanu Negi (VLSID, 2014)

A robust authentication methodology using physically unclonable functions in DRAM arrays. - Maryam S. Hashemian; Bhanu Pratap Singh; Francis G. Wolff; Daniel J. Weyer; Steve Clay; Christos A. Papachristou (DATE, 2015)

Efficient Hardware Implementations of Binary-to-BCD Conversion Schemes for Decimal Multiplication. - Osama Daifallah Al-Khaleel; Zakaria Al-Qudah; Mohammad Al-Khaleel; Raed Bani-Hani; Christos A. Papachristou; Francis G. Wolff (J. Circuits Syst. Comput., 2015)

Methodology for Tradeoffs between Performance and Lifetimes of Integrated Circuits. - Daniel J. Weyer; Francis G. Wolff; Christos A. Papachristou; Steve Clay (IOLTS, 2019)

Design Space Exploration Driven by Lifetime Concerns due to Electromigration. - Francis G. Wolff; Daniel J. Weyer; Christos A. Papachristou; Steve Clay (ISQED, 2020)

Explainable Neural Network Recognition of Handwritten Characters. - Paul Whitten; Francis G. Wolff; Christos A. Papachristou (CCWC, 2023)

Design of High Speed BCD Adder Using CMOS Technology. - Abdelsalam Al Share; Fadi Nessir Zghoul; Osama Daifallah Al-Khaleel; Mohammad Al-Khaleel; Christos A. Papachristou (IEEE Access, 2023)

An AI Architecture with the Capability to Explain Recognition Results. - Paul Whitten; Francis G. Wolff; Christos A. Papachristou (CoRR, 2024)

An AI Architecture with the Capability to Classify and Explain Hardware Trojans. - Paul Whitten; Francis G. Wolff; Christos A. Papachristou (CoRR, 2024)

Design and Implementation of High-Speed Carry Look-Ahead Decimal Adder (CLDA) Using CMOS Technology. - Abdelsalam Al Share; Osama Daifallah Al-Khaleel; Fadi Nessir Zghoul; Mohammad Al-Khaleel; Christos A. Papachristou (IEEE Access, 2025)