Design and analysis of an NoC architecture from performance, reliability and energy perspective. - Jongman Kim; Dongkook Park; Chrysostomos Nicopoulos; Narayanan Vijaykrishnan; Chita R. Das (ANCS, 2005)

Exploring Fault-Tolerant Network-on-Chip Architectures. - Dongkook Park; Chrysostomos Nicopoulos; Jongman Kim; Narayanan Vijaykrishnan; Chita R. Das (DSN, 2006)

A Gracefully Degrading and Energy-Efficient Modular Router Architecture for On-Chip Networks. - Jongman Kim; Chrysostomos Nicopoulos; Dongkook Park; Vijaykrishnan Narayanan; Mazin S. Yousif; Chita R. Das (ISCA, 2006)

Design and Management of 3D Chip Multiprocessors Using Network-in-Memory. - Feihui Li; Chrysostomos Nicopoulos; Thomas D. Richardson; Yuan Xie 001; Narayanan Vijaykrishnan; Mahmut T. Kandemir (ISCA, 2006)

ViChaR: A Dynamic Virtual Channel Regulator for Network-on-Chip Routers. - Chrysostomos Nicopoulos; Dongkook Park; Jongman Kim; Narayanan Vijaykrishnan; Mazin S. Yousif; Chita R. Das (MICRO, 2006)

A Distributed Multi-Point Network Interface for Low-Latency, Deadlock-Free On-Chip Interconnects. - Dongkook Park; Chrysostomos Nicopoulos; Jongman Kim; Narayanan Vijaykrishnan; Chita R. Das (Nano-Net, 2006)

A Hybrid SoC Interconnect with Dynamic TDMA-Based Transaction-Less Buses and On-Chip Networks. - Thomas D. Richardson; Chrysostomos Nicopoulos; Dongkook Park; Narayanan Vijaykrishnan; Yuan Xie 001; Chita R. Das; Vijay Degalahal (VLSI Design, 2006)

Design of a Dynamic Priority-Based Fast Path Architecture for On-Chip Interconnects. - Dongkook Park; Reetuparna Das; Chrysostomos Nicopoulos; Jongman Kim; Narayanan Vijaykrishnan; Ravishankar R. Iyer 001; Chita R. Das (Hot Interconnects, 2007)

Variation-aware task allocation and scheduling for MPSoC. - Feng Wang 004; Chrysostomos Nicopoulos; Xiaoxia Wu; Yuan Xie 001; Narayanan Vijaykrishnan (ICCAD, 2007)

A novel dimensionally-decomposed router for on-chip communication in 3D architectures. - Jongman Kim; Chrysostomos Nicopoulos; Dongkook Park; Reetuparna Das; Yuan Xie 001; Narayanan Vijaykrishnan; Mazin S. Yousif; Chita R. Das (ISCA, 2007)

Design space exploration for field programmable compressor trees. - Seyed-Hosein Attarzadeh-Niaki; Alessandro Cevrero; Philip Brisk; Chrysostomos Nicopoulos; Frank K. Gürkaynak; Yusuf Leblebici; Paolo Ienne (CASES, 2008)

Analysis and solutions to issue queue process variation. - Niranjan Soundararajan; Aditya Yanamandra; Chrysostomos Nicopoulos; Narayanan Vijaykrishnan; Anand Sivasubramaniam; Mary Jane Irwin (DSN, 2008)

Performance and power optimization through data compression in Network-on-Chip architectures. - Reetuparna Das; Asit K. Mishra; Chrysostomos Nicopoulos; Dongkook Park; Vijaykrishnan Narayanan; Ravishankar R. Iyer 001; Mazin S. Yousif; Chita R. Das (HPCA, 2008)

Field Programmable Compressor Trees: Acceleration of Multi-Input Addition on FPGAs. - Alessandro Cevrero; Panagiotis Athanasopoulos; Hadi Parandeh-Afshar; Ajay Kumar Verma; Seyed-Hosein Attarzadeh-Niaki; Chrysostomos Nicopoulos; Frank K. Gürkaynak; Philip Brisk; Yusuf Leblebici; Paolo Ienne (ACM Trans. Reconfigurable Technol. Syst., 2009)

A fine-grained link-level fault-tolerant mechanism for networks-on-chip. - Arseniy Vitkovskiy; Vassos Soteriou; Chrysostomos Nicopoulos (ICCD, 2010)

On the Effects of Process Variation in Network-on-Chip Architectures. - Chrysostomos Nicopoulos; Suresh Srinivasan; Aditya Yanamandra; Dongkook Park; Vijaykrishnan Narayanan; Chita R. Das; Mary Jane Irwin (IEEE Trans. Dependable Secur. Comput., 2010)

Network-on-Chip Architectures - A Holistic Design Exploration - Chrysostomos Nicopoulos; Vijaykrishnan Narayanan; Chita R. Das (Springer, 2010)

A High-Performance and Energy-Efficient Virtually Tagged Stack Cache Architecture for Multi-core Environments. - Suk Chan Kang; Chrysostomos Nicopoulos; Hyung Gyu Lee; Jongman Kim (HPCC, 2011)

An energy- and performance-aware DRAM cache architecture for hybrid DRAM/PCM main memory systems. - Hyung Gyu Lee; Seungcheol Baek; Chrysostomos Nicopoulos; Jongman Kim (ICCD, 2011)

Large-Scale Semantic Concept Detection on Manycore Platforms for Multimedia Mining. - Mamadou Diao; Chrysostomos Nicopoulos; Jongman Kim (IPDPS, 2011)

Hardware-Based Job Queue Management for Manycore Architectures and OpenMP Environments. - Junghee Lee; Chrysostomos Nicopoulos; Yongjae Lee; Hyung Gyu Lee; Jongman Kim (IPDPS, 2011)

Variation-Aware Task and Communication Mapping for MPSoC Architecture. - Feng Wang 004; Yibo Chen; Chrysostomos Nicopoulos; Xiaoxia Wu; Yuan Xie 001; Narayanan Vijaykrishnan (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011)

A programmable processing array architecture supporting dynamic task scheduling and module-level prefetching. - Junghee Lee; Hyung Gyu Lee; Soonhoi Ha; Jongman Kim; Chrysostomos Nicopoulos (Conf. Computing Frontiers, 2012)

A dual-phase compression mechanism for hybrid DRAM/PCM main memory architectures. - Seungcheol Baek; Hyung Gyu Lee; Chrysostomos Nicopoulos; Jongman Kim (ACM Great Lakes Symposium on VLSI, 2012)

A highly robust distributed fault-tolerant routing algorithm for NoCs with localized rerouting. - Arseniy Vitkovskiy; Vassos Soteriou; Chrysostomos Nicopoulos (INA-OCMC@HiPEAC, 2012)

Thermal characterization of cloud workloads on a power-efficient server-on-chip. - Dragomir Milojevic; Sachin Idgunji; Djordje Jevdjic; Emre Ozer 001; Pejman Lotfi-Kamran; Andreas Panteli; Andreas Prodromou; Chrysostomos Nicopoulos; Damien Hardy; Babak Falsafi; Yiannakis Sazeides (ICCD, 2012)

Virtualizing Virtual Channels for Increased Network-on-Chip Robustness and Upgradeability. - Marios Evripidou; Chrysostomos Nicopoulos; Vassos Soteriou; Jongman Kim (ISVLSI, 2012)

A Compression-Based Hybrid MLC/SLC Management Technique for Phase-Change Memory Systems. - Hyung Gyu Lee; Seungcheol Baek; Jongman Kim; Chrysostomos Nicopoulos (ISVLSI, 2012)

NoCAlert: An On-Line and Real-Time Fault Detection Mechanism for Network-on-Chip Architectures. - Andreas Prodromou; Andreas Panteli; Chrysostomos Nicopoulos; Yiannakis Sazeides (MICRO, 2012)

Optimizing Data-Center TCO with Scale-Out Processors. - Boris Grot; Damien Hardy; Pejman Lotfi-Kamran; Babak Falsafi; Chrysostomos Nicopoulos; Yiannakis Sazeides (IEEE Micro, 2012)

A Dynamically Adjusting Gracefully Degrading Link-Level Fault-Tolerant Mechanism for NoCs. - Arseniy Vitkovskiy; Vassos Soteriou; Chrysostomos Nicopoulos (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012)

Switch folding: network-on-chip routers with time-multiplexed output ports. - Giorgos Dimitrakopoulos; N. Georgiadis; Chrysostomos Nicopoulos; Emmanouil Kalligeros (DATE, 2013)

DaemonGuard: O/S-assisted selective software-based Self-Testing for multi-core systems. - Michael A. Skitsas; Chrysostomos Nicopoulos; Maria K. Michael (DFTS, 2013)

ECM: Effective Capacity Maximizer for high-performance compressed caching. - Seungcheol Baek; Hyung Gyu Lee; Chrysostomos Nicopoulos; Junghee Lee; Jongman Kim (HPCA, 2013)

Hardware-Assisted Intrusion Detection by Preserving Reference Information Integrity. - Junghee Lee; Chrysostomos Nicopoulos; Gi-Hwan Oh; Sang-Won Lee 001; Jongman Kim (ICA3PP (1), 2013)

Do we need wide flits in Networks-on-Chip? - Junghee Lee; Chrysostomos Nicopoulos; Sung Joo Park; Madhavan Swaminathan; Jongman Kim (ISVLSI, 2013)

Dynamic fault-tolerant routing algorithm for networks-on-chip based on localised detouring paths. - Arseniy Vitkovskiy; Vassos Soteriou; Chrysostomos Nicopoulos (IET Comput. Digit. Tech., 2013)

Sharded Router: A novel on-chip router architecture employing bandwidth sharding and stealing. - Junghee Lee; Chrysostomos Nicopoulos; Hyung Gyu Lee; Jongman Kim (Parallel Comput., 2013)

TornadoNoC: A lightweight and scalable on-chip network architecture for the many-core era. - Junghee Lee; Chrysostomos Nicopoulos; Hyung Gyu Lee; Jongman Kim (ACM Trans. Archit. Code Optim., 2013)

IsoNet: Hardware-Based Job Queue Management for Many-Core Architectures. - Junghee Lee; Chrysostomos Nicopoulos; Hyung Gyu Lee; Shreepad Panth; Sung Kyu Lim; Jongman Kim (IEEE Trans. Very Large Scale Integr. Syst., 2013)

ElastiStore: An elastic buffer architecture for Network-on-Chip routers. - I. Seitanidis; Anastasios Psarras; Giorgos Dimitrakopoulos; Chrysostomos Nicopoulos (DATE, 2014)

Exploration of system availability during software-based self-testing in many-core systems under test latency constraints. - Michael A. Skitsas; Chrysostomos Nicopoulos; Maria K. Michael (DFT, 2014)

ElastiNoC: A self-testable distributed VC-based Network-on-Chip architecture. - I. Seitanidis; Anastasios Psarras; Emmanouil Kalligeros; Chrysostomos Nicopoulos; Giorgos Dimitrakopoulos (NOCS, 2014)

Centaur: a hybrid network-on-chip architecture utilizing micro-network fusion. - Junghee Lee; Chrysostomos Nicopoulos; Hyung Gyu Lee; Jongman Kim (Des. Autom. Embed. Syst., 2014)

Designing Hybrid DRAM/PCM Main Memory Systems Utilizing Dual-Phase Compression. - Seungcheol Baek; Hyung Gyu Lee; Chrysostomos Nicopoulos; Jongman Kim (ACM Trans. Design Autom. Electr. Syst., 2014)

PhaseNoC: TDM scheduling at the virtual-channel level for efficient network traffic isolation. - Anastasios Psarras; I. Seitanidis; Chrysostomos Nicopoulos; Giorgos Dimitrakopoulos (DATE, 2015)

Timing-resilient Network-on-Chip architectures. - Alexandros Panteloukas; Anastasios Psarras; Chrysostomos Nicopoulos; Giorgos Dimitrakopoulos (IOLTS, 2015)

Toward efficient check-pointing and rollback under on-demand SBST in chip multi-processors. - Michael A. Skitsas; Chrysostomos Nicopoulos; Maria K. Michael (IOLTS, 2015)

HARPA: Solutions for dependable performance under physically induced performance variability. - Dimitrios Rodopoulos; Simone Corbetta; Giuseppe Massari; Simone Libutti; Francky Catthoor; Yiannakis Sazeides; Chrysostomos Nicopoulos; Antoni Portero; Etienne Cappe; Radim Vavrík; Vít Vondrák; Dimitrios Soudris; et al. (SAMOS, 2015)

Subtleties of Run-Time VirtualAddress Stacks. - Suk Chan Kang; Chrysostomos Nicopoulos; Ada Gavrilovska; Jongman Kim (IEEE Comput. Archit. Lett., 2015)

Size-Aware Cache Management for Compressed Cache Architectures. - Seungcheol Baek; Hyung Gyu Lee; Chrysostomos Nicopoulos; Junghee Lee; Jongman Kim (IEEE Trans. Computers, 2015)

ElastiStore: Flexible Elastic Buffering for Virtual-Channel-Based Networks on Chip. - Ioannis Seitanidis; Anastasios Psarras; Kypros Chrysanthou; Chrysostomos Nicopoulos; Giorgos Dimitrakopoulos (IEEE Trans. Very Large Scale Integr. Syst., 2015)

CrossOver: Clock domain crossing under virtual-channel flow control. - Michalis Paschou; Anastasios Psarras; Chrysostomos Nicopoulos; Giorgos Dimitrakopoulos (DATE, 2016)

A Low-Power Network-on-Chip Architecture for Tile-based Chip Multi-Processors. - Anastasios Psarras; Junghee Lee; Pavlos M. Mattheakis; Chrysostomos Nicopoulos; Giorgos Dimitrakopoulos (ACM Great Lakes Symposium on VLSI, 2016)

RapidLink: A network-on-chip architecture with double-data-rate links. - Anastasios Psarras; Savvas Moisidis; Chrysostomos Nicopoulos; Giorgos Dimitrakopoulos (ICECS, 2016)

Powermax: an automated methodology for generating peak-power traffic in networks-on-chip. - Ioannis Seitanidis; Chrysostomos Nicopoulos; Giorgos Dimitrakopoulos (NOCS, 2016)

Toward Multi-Layer Holistic Evaluation of System Designs. - Marios Kleanthous; Yiannakis Sazeides; Emre Özer 001; Chrysostomos Nicopoulos; Panagiota Nikolaou; Zacharias Hadjilambrou (IEEE Comput. Archit. Lett., 2016)

An Online and Real-Time Fault Detection and Localization Mechanism for Network-on-Chip Architectures. - Kypros Chrysanthou; Panayiotis Englezakis; Andreas Prodromou; Andreas Panteli; Chrysostomos Nicopoulos; Yiannakis Sazeides; Giorgos Dimitrakopoulos (ACM Trans. Archit. Code Optim., 2016)

ShortPath: A Network-on-Chip Router with Fine-Grained Pipeline Bypassing. - Anastasios Psarras; Ioannis Seitanidis; Chrysostomos Nicopoulos; Giorgos Dimitrakopoulos (IEEE Trans. Computers, 2016)

DaemonGuard: Enabling O/S-Orchestrated Fine-Grained Software-Based Selective-Testing in Multi-/Many-Core Microprocessors. - Michael A. Skitsas; Chrysostomos A. Nicopoulos; Maria K. Michael (IEEE Trans. Computers, 2016)

PhaseNoC: Versatile Network Traffic Isolation Through TDM-Scheduled Virtual Channels. - Anastasios Psarras; Junghee Lee; Ioannis Seitanidis; Chrysostomos Nicopoulos; Giorgos Dimitrakopoulos (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016)

HARPA: Tackling physically induced performance variability. - Nikolaos Zompakis; Michail Noltsis; Lorena Ndreu; Zacharias Hadjilambrou; Panayiotis Englezakis; Panagiota Nikolaou; Antoni Portero; Simone Libutti; Giuseppe Massari; Federico Sassi; Alessandro Bacchini; Chrysostomos Nicopoulos; et al. (DATE, 2017)

Low-cost congestion management in networks-on-chip using edge and in-network traffic throttling. - Monobrata Debnath; Dimitris Konstantinou; Chrysostomos Nicopoulos; Giorgos Dimitrakopoulos; Wei-Ming Lin; Junghee Lee (AISTECS@HiPEAC, 2017)

A Design Space Exploration Framework for ANN-Based Fault Detection in Hardware Systems. - Andreas G. Savva; Theocharis Theocharides; Chrysostomos Nicopoulos (J. Electr. Comput. Eng., 2017)

BlackOut: Enabling fine-grained power gating of buffers in Network-on-Chip routers. - Davide Zoni; Andrea Canidio; William Fornaciari; Panayiotis Englezakis; Chrysostomos Nicopoulos; Yiannakis Sazeides (J. Parallel Distributed Comput., 2017)

A Dual-Clock Multiple-Queue Shared Buffer. - Anastasios Psarras; Michalis Paschou; Chrysostomos Nicopoulos; Giorgos Dimitrakopoulos (IEEE Trans. Computers, 2017)

Networks-on-Chip With Double-Data-Rate Links. - Anastasios Psarras; Savvas Moisidis; Chrysostomos Nicopoulos; Giorgos Dimitrakopoulos (IEEE Trans. Circuits Syst. I Regul. Pap., 2017)

HoPE: Hot-Cacheline Prediction for Dynamic Early Decompression in Compressed LLCs. - Jaehyun Park 005; Seungcheol Baek; Hyung Gyu Lee; Chrysostomos Nicopoulos; Vinson Young; Junghee Lee; Jongman Kim (ACM Trans. Design Autom. Electr. Syst., 2017)

Hardware-Based Online Self-Diagnosis for Faulty Device Identification in Large-Scale IoT Systems. - Junghee Lee; Monobrata Debnath; Amit Patki; Mostafa Hasan; Chrysostomos Nicopoulos (IoTDI, 2018)

Low-power dual-edge-triggered synchronous latency-insensitive systems. - Dimitris Konstantinou; Anastasios Psarras; Giorgos Dimitrakopoulos; Chrysostomos Nicopoulos (MOCAST, 2018)

Fast Estimations of Failure Probability Over Long Time Spans. - Michail Noltsis; Panayiotis Englezakis; Eleni Maragkoudaki; Chrysostomos Nicopoulos; Dimitrios Rodopoulos; Francky Catthoor; Yiannakis Sazeides; Davide Zoni; Dimitrios Soudris (NANOARCH, 2018)

Exploring System Availability During Software-Based Self-Testing of Multi-core CPUs. - Michael A. Skitsas; Chrysostomos A. Nicopoulos; Maria K. Michael (J. Electron. Test., 2018)

A low-cost synthesizable RISC-V dual-issue processor core leveraging the compressed Instruction Set Extension. - Karyofyllis Patsidis; Dimitris Konstantinou; Chrysostomos Nicopoulos; Giorgos Dimitrakopoulos (Microprocess. Microsystems, 2018)

Error-Shielded Register Renaming Sub-system for a Dynamically Scheduled Out-of-Order Core. - Ron Gabor; Yiannakis Sazeides; Arkady Bramnik; Alexandros Andreou; Chrysostomos Nicopoulos; Karyofyllis Patsidis; Dimitris Konstantinou; Giorgos Dimitrakopoulos (DATE, 2019)

Dynamic Adjustment of Test-Sequence Duration for Increasing the Functional Coverage. - Zacharias Takakis; Dimitrios Mangiras; Chrysostomos Nicopoulos; Giorgos Dimitrakopoulos (IVSW, 2019)

Multi-Armed Bandits for Autonomous Timing-driven Design Optimization. - Apostolos Stefanidis; Dimitrios Mangiras; Chrysostomos Nicopoulos; Giorgos Dimitrakopoulos (PATMOS, 2019)

Automatic Generation of Peak-Power Traffic for Networks-on-Chip. - Ioannis Seitanidis; Chrysostomos Nicopoulos; Giorgos Dimitrakopoulos (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019)

2D Error Correction for F/F based Arrays using In-Situ Real-Time Error Detection (RTD). - Yiannakis Sazeides; Arkady Bramnik; Ron Gabor; Chrysostomos Nicopoulos; Ramon Canal; Dimitris Konstantinou; Giorgos Dimitrakopoulos (DFT, 2020)

SmartFork: Partitioned Multicast Allocation and Switching in Network-on-Chip Routers. - Dimitrios Konstantinou; Chrysostomos Nicopoulos; Junghee Lee; Georgios Ch. Sirakoulis; Giorgos Dimitrakopoulos (ISCAS, 2020)

RISC-V2: A Scalable RISC-V Vector Processor. - Karyofyllis Patsidis; Chrysostomos Nicopoulos; Georgios Ch. Sirakoulis; Giorgos Dimitrakopoulos (ISCAS, 2020)

Design Optimization by Fine-grained Interleaving of Local Netlist Transformations in Lagrangian Relaxation. - Apostolos Stefanidis; Dimitrios Mangiras; Chrysostomos Nicopoulos; David G. Chinnery; Giorgos Dimitrakopoulos (ISPD, 2020)

Practical Verifiable Computation by Using a Hardware-Based Correct Execution Environment. - Junghee Lee; Chrysostomos Nicopoulos; Gweonho Jeong; Jihye Kim 001; Hyunok Oh (IEEE Access, 2020)

Timing-Driven Placement Optimization Facilitated by Timing-Compatibility Flip-Flop Clustering. - Dimitrios Mangiras; Apostolos Stefanidis; Ioannis Seitanidis; Chrysostomos Nicopoulos; Giorgos Dimitrakopoulos (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

The Mesochronous Dual-Clock FIFO Buffer. - Dimitrios Konstantinou; Anastasios Psarras; Chrysostomos Nicopoulos; Giorgos Dimitrakopoulos (IEEE Trans. Very Large Scale Integr. Syst., 2020)

Multicast-enabled network-on-chip routers leveraging partitioned allocation and switching. - Dimitris Konstantinou; Chrysostomos Nicopoulos; Junghee Lee; Giorgos Dimitrakopoulos (Integr., 2021)

Autonomous Application of Netlist Transformations Inside Lagrangian Relaxation-Based Optimization. - Apostolos Stefanidis; Dimitrios Mangiras; Chrysostomos Nicopoulos; David G. Chinnery; Giorgos Dimitrakopoulos (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021)

FusedGCN: A Systolic Three-Matrix Multiplication Architecture for Graph Convolutional Networks. - Christodoulos Peltekis; Dionysios Filippas; Chrysostomos Nicopoulos; Giorgos Dimitrakopoulos (ASAP, 2022)

LeapConv: An Energy-Efficient Streaming Convolution Engine with Reconfigurable Stride. - Dionysios Filippas; Chrysostomos Nicopoulos; Giorgos Dimitrakopoulos (ISVLSI, 2022)

IDLD: Instantaneous Detection of Leakage and Duplication of Identifiers used for Register Renaming. - Yiannakis Sazeides; Alex Gerber; Ron Gabor; Arkady Bramnik; George Papadimitriou 001; Dimitris Gizopoulos; Chrysostomos Nicopoulos; Giorgos Dimitrakopoulos; Karyofyllis Patsidis (MICRO, 2022)

Virtual-Channel Flow Control Across Mesochronous Clock Domains. - Giorgos Dimitrakopoulos; Anastasios Psarras; Chrysostomos Nicopoulos (MOCAST, 2022)

A Hardware-Assisted Heartbeat Mechanism for Fault Identification in Large-Scale IoT Systems. - Mandrita Banerjee; Carlo Borges; Kim-Kwang Raymond Choo; Junghee Lee; Chrysostomos Nicopoulos (IEEE Trans. Dependable Secur. Comput., 2022)

Low-Cost Online Convolution Checksum Checker. - Dionysios Filippas; Nikolaos Margomenos; Nikolaos Mitianoudis; Chrysostomos Nicopoulos; Giorgos Dimitrakopoulos (IEEE Trans. Very Large Scale Integr. Syst., 2022)

Reduced-Precision Floating-Point Arithmetic in Systolic Arrays with Skewed Pipelines. - Dionysios Filippas; Christodoulos Peltekis; Giorgos Dimitrakopoulos; Chrysostomos Nicopoulos (AICAS, 2023)

ArrayFlex: A Systolic Array Architecture with Configurable Transparent Pipelining. - Christodoulos Peltekis; Dionysios Filippas; Giorgos Dimitrakopoulos; Chrysostomos Nicopoulos; Dionisios N. Pnevmatikatos (DATE, 2023)

Multi-Armed Bandits for Autonomous Test Application in RISC-V Processor Verification. - Giorgos Dimitrakopoulos; E. Kallitsounakis; Z. Takakis; A. Stefanidis; Chrysostomos Nicopoulos (MOCAST, 2023)

Low-Power Data Streaming in Systolic Arrays with Bus-Invert Coding and Zero-Value Clock Gating. - Christodoulos Peltekis; Dionysios Filippas; Giorgos Dimitrakopoulos; Chrysostomos Nicopoulos (MOCAST, 2023)

The Case for Asymmetric Systolic Array Floorplanning. - Christodoulos Peltekis; Dionysios Filippas; Giorgos Dimitrakopoulos; Chrysostomos A. Nicopoulos (CoRR, 2023)

Exploiting data encoding and reordering for low-power streaming in systolic arrays. - Christodoulos Peltekis; Dionysios Filippas; Giorgos Dimitrakopoulos; Chrysostomos Nicopoulos (Microprocess. Microsystems, 2023)

Streaming Dilated Convolution Engine. - Dionysios Filippas; Chrysostomos Nicopoulos; Giorgos Dimitrakopoulos (IEEE Trans. Very Large Scale Integr. Syst., 2023)

Robustness of Artificial Neural Networks Based on Weight Alterations Used for Prediction Purposes. - Andreas G. Savva; Theocharis Theocharides; Chrysostomos Nicopoulos (Algorithms, 2023)

IndexMAC: A Custom RISC-V Vector Instruction to Accelerate Structured-Sparse Matrix Multiplications. - Vasileios Titopoulos; Kosmas Alexandridis; Christodoulos Peltekis; Chrysostomos Nicopoulos; Giorgos Dimitrakopoulos (DATE, 2024)

A Hardware-Based Correct Execution Environment Supporting Virtual Memory. - Daehyeon Lee; Ohsuk Shin; Yeonghyeon Cha; Junghee Lee; Taisic Yun; Jihye Kim 001; Hyunok Oh; Chrysostomos Nicopoulos; Sang Su Lee (IEEE Access, 2024)

DeMM: A Decoupled Matrix Multiplication Engine Supporting Relaxed Structured Sparsity. - Christodoulos Peltekis; Vasileios Titopoulos; Chrysostomos Nicopoulos; Giorgos Dimitrakopoulos (IEEE Comput. Archit. Lett., 2024)

Register Dispersion: Reducing the Footprint of the Vector Register File in Vector Engines of Low-Cost RISC-V CPUs. - Vasileios Titopoulos; George Alexakis; Kosmas Alexandridis; Chrysostomos Nicopoulos; Giorgos Dimitrakopoulos (CF, 2025)

Efficient Implementation of RISC-V Vector Permutation Instructions. - Vasileios Titopoulos; George Alexakis; Chrysostomos Nicopoulos; Giorgos Dimitrakopoulos (ISVLSI, 2025)

Periodic Online Testing for Sparse Systolic Tensor Arrays. - Christodoulos Peltekis; Chrysostomos Nicopoulos; Giorgos Dimitrakopoulos (MOCAST, 2025)

MultiFile View: File-View-Based Isolation in a Single-User Environment to Protect User Data Files. - Jione Choi; Junghee Lee; Gyuho Lee; Jaegwan Yu; Aran Park; Chrysostomos Nicopoulos (IEEE Trans. Dependable Secur. Comput., 2025)

Optimizing Structured-Sparse Matrix Multiplication in RISC-V Vector Processors. - Vasileios Titopoulos; Kosmas Alexandridis; Christodoulos Peltekis; Chrysostomos Nicopoulos; Giorgos Dimitrakopoulos (IEEE Trans. Computers, 2025)