Effect of Radiation on Interface Traps of SOI NMOSFETs by the Direct-Current Current-Voltage Technique. - Yangyang Li; Xiaojing Li; Bo Li; Linchun Gao; Weiwei Yan; Fangfang Wang; Duoli Li; Chuanbin Zeng; Jiajun Luo; Zhengsheng Han (IEEE Access, 2019)

RIVL: A Low-Cost SoC Agile Development Platform for Multiple RISC-V Processors Design and Verification. - Lida Xu; Zewen Cao; Hualong Zhao; Zhuo Peng; Yuchi Miao; Chunan Zhuang; Hongrui Ruan; Yuying Dong; Chuanbin Zeng; Bo Li 051; Jiajun Luo (IEEE Trans. Circuits Syst. I Regul. Pap., 2025)