Low power aging-aware register file design by duty cycle balancing. - Shuai Wang 006; Tao Jin; Chuanlei Zheng; Guangshan Duan (DATE, 2012)

Exploring hardware transaction processing for reliable computing in chip-multiprocessors against soft errors. - Chuanlei Zheng; Parijat Shukla; Shuai Wang 006; Jie S. Hu (DFT, 2012)

Combating NBTI-induced aging in data caches. - Shuai Wang 006; Guangshan Duan; Chuanlei Zheng; Tao Jin (ACM Great Lakes Symposium on VLSI, 2013)

Characterizing soft error vulnerability of cache coherence protocols for chip-multiprocessors. - Chuanlei Zheng; Shuai Wang 006 (DFT, 2014)

Low Power Aging-Aware On-Chip Memory Structure Design by Duty Cycle Balancing. - Shuai Wang 006; Tao Jin; Chuanlei Zheng; Guangshan Duan (J. Circuits Syst. Comput., 2016)

Continuity Enhancement Method for Real-Time PPP Based on Zero-Baseline Constraint of Multi-Receiver. - Fuxin Yang; Chuanlei Zheng; Hui Li; Liang Li; Jie Zhang; Lin Zhao 001 (Remote. Sens., 2021)

The Initial Performance Evaluation of Mixed Multi-Frequency Undifferenced and Uncombined BDS-2/3 Precise Point Positioning under Urban Environmental Conditions. - Fuxin Yang; Chuanlei Zheng; Jie Zhang; Zhiguo Sun; Liang Li; Lin Zhao (Remote. Sens., 2022)