A Reconfigurable Approximate Multiplier for Quantized CNN Applications. - Chuliang Guo; Li Zhang 021; Xian Zhou; Weikang Qian; Cheng Zhuo (ASP-DAC, 2020)

A Convolutional Neural Network Accelerator Architecture with Fine-Granular Mixed Precision Configurability. - Xian Zhou; Li Zhang 021; Chuliang Guo; Xunzhao Yin; Cheng Zhuo (ISCAS, 2020)

Joint Sparsity with Mixed Granularity for Efficient GPU Implementation. - Chuliang Guo; Xingang Yan; Yufei Chen 007; He Li 008; Xunzhao Yin; Cheng Zhuo (DATE, 2021)

Regularization-Free Structural Pruning for GPU Inference Acceleration. - Chuliang Guo; Yanbing Yang; Li Zhang 021; Shaodi Wang; He Li 008; Keyu Long; Xunzhao Yin; Cheng Zhuo (ISQED, 2021)

A Reconfigurable Multiplier for Signed Multiplications with Asymmetric Bit-Widths. - Chuliang Guo; Li Zhang 021; Xian Zhou; Grace Li Zhang; Bing Li 005; Weikang Qian; Xunzhao Yin; Cheng Zhuo (ACM J. Emerg. Technol. Comput. Syst., 2021)

Landslide susceptibility assessment based on multi GPUs: a deep learning approach. - Chuliang Guo; Jinxia Wu; Shuaihe Zhao; Zihao Wang; Sansar Raj Meena; Feng Zhang 012 (CCF Trans. High Perform. Comput., 2022)

Single-Batch CNN Training using Block Minifloats on FPGAs. - Chuliang Guo; Binglei Lou; Xueyuan Liu 002; David Boland; Philip H. W. Leong (FPGA, 2023)

BOOST: Block Minifloat-Based On-Device CNN Training Accelerator with Transfer Learning. - Chuliang Guo; Binglei Lou; Xueyuan Liu 002; David Boland; Philip H. W. Leong; Cheng Zhuo (ICCAD, 2023)

GANDSE: Generative Adversarial Network-based Design Space Exploration for Neural Network Accelerator Design. - Lang Feng 001; Wenjian Liu; Chuliang Guo; Ke Tang; Cheng Zhuo; Zhongfeng Wang 001 (ACM Trans. Design Autom. Electr. Syst., 2023)

FPGA-based component-wise LSTM training accelerator for neural granger causality analysis. - Chuliang Guo; Yufei Chen; Yu Fu (Neurocomputing, 2025)

Highly Parallel CNN Accelerator for RepVGG-Like Network Training on FPGAs. - Chuliang Guo; Binglei Lou; David Boland; Philip H. W. Leong (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)