An Integrated Data Path Optimization for Low Power Based on Network Flow Method. - Chun-Gi Lyuh; Taewhan Kim 001; Chien-Liang Liu (ICCAD, 2001)

Coupling-aware high-level interconnect synthesis for low power. - Chun-Gi Lyuh; Taewhan Kim 001; Ki-Wook Kim (ICCAD, 2002)

High-level synthesis for low power based on network flow method. - Chun-Gi Lyuh; Taewhan Kim 001 (IEEE Trans. Very Large Scale Integr. Syst., 2003)

Resource-constrained low-power bus encoding with crosstalk delay elimination. - Meeyoung Cha; Chun-Gi Lyuh; Taewhan Kim 001 (ASP-DAC, 2004)

Memory access scheduling and binding considering energy minimization in multi-bank memory systems. - Chun-Gi Lyuh; Taewhan Kim 001 (DAC, 2004)

Coupling-aware high-level interconnect synthesis [IC layout]. - Chun-Gi Lyuh; Taewhan Kim 001; Ki-Wook Kim (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004)

Fast human detection using selective block-based HOG-LBP. - Won-Jae Park; Dae-Hwan Kim; Suryanto; Chun-Gi Lyuh; Tae Moon Roh; Sung-Jea Ko (ICIP, 2012)

Function-Safe Vehicular AI Processor with Nano Core-In-Memory Architecture. - Youngsu Kwon; Jeongmin Yang; Yong Cheol Peter Cho; Kyoung-Seon Shin; Jaehoon Chung; Jinho Han; Chun-Gi Lyuh; Hyun-Mi Kim; Chan Kim; Min-Seok Choi (AICAS, 2019)

Implementation of Yolo-v2 Image Recognition and Other Testbenches for a CNN Accelerator. - Chan Kim; In San Jeon; Young-Su Kwon; Hyun-Mi Kim; Chun-Gi Lyuh; Yong Cheol Peter Cho; Jeongmin Yang; Jaehoon Chung; Kyoung-Seon Shin; Jinho Han; Min-Seok Choi (ICCE-Berlin, 2019)

AI 32TFLOPS Autonomous Driving Processor on AI-Ware with Adaptive Power Saving. - Youngsu Kwon; Yong Cheol Peter Cho; Jeongmin Yang; Jaehoon Chung; Kyoung-Seon Shin; Jinho Han; Chan Kim; Chun-Gi Lyuh; Hyun-Mi Kim; In San Jeon; Min-Seok Choi (ISOCC, 2019)

HPC LINPACK Parameter Optimization on Homo-/Heterogeneous System of ARM Neoverse N1SDP. - Je-Seok Ham; Yong Cheol Peter Cho; Ju-Yeob Kim; Chun-Gi Lyuh; Jin-Kyu Kim; Jinho Han; Youngsu Kwon (HPC Asia, 2021)

Live Demonstration: A Neural Processor for AI Acceleration. - Hyeji Kim; Jaehoon Chung; Kyoung-Seon Shin; Chun-Gi Lyuh; Hyun-Mi Kim; Chan Kim; Yong Cheol Peter Cho; Jeongmin Yang; Je-Seok Ham; Minseok Choi; Jinho Han; Youngsu Kwon (ISCAS, 2021)

ArtBrain-K: AI Processor based-on 5-PetaFLOPS AI Server System. - Jinho Han; Chun-Gi Lyuh; Kyeongsun Shin; Hyun-Mi Kim; Hyunjeong Kwon; Jaehoon Chung; Yong Cheol Peter Cho; Jinkyu Kim; Jeonghui Suk; Chan Kim; Minseok Choi; Youngsu Kwon (AICAS, 2022)

M3FPU: Multiformat Matrix Multiplication FPU Architectures for Neural Network Computations. - Won Jeon; Yong Cheol Peter Cho; Hyun-Mi Kim; Hyeji Kim; Jaehoon Chung; Ju-Yeob Kim; Miyoung Lee; Chun-Gi Lyuh; Jinho Han; Youngsu Kwon (AICAS, 2022)

AIWareK: Compiling PyTorch Model for AI Processor Using MLIR Framework. - Hyunjeong Kwon; Hyun-Mi Kim; Chun-Gi Lyuh; Jin-Kyu Kim; Jinho Han; Youngsu Kwon (AICAS, 2022)