Design strategy of localized halo profile for achieving sub-50 nm bulk MOSFET. - Chun-Hsing Shih; Yi-Min Chen; Chen-Hsin Lien (Microelectron. Reliab., 2004)

Quantum confinement effect in strained-Si1-xGex double-gate tunnel field-effect transistors. - Nguyen Dang Chien; Chun-Hsing Shih; Luu The Vinh; Nguyen Van Kien (ICICDT, 2013)

Iterative programming analysis of dopant-segregated multibit/cell Schottky barrier charge-trapping memories. - Yu-Hsuan Chen; Jr-Jie Tsai; Yan-Xiang Luo; Chun-Hsing Shih (NVMTS, 2015)

Reliability impacts of high-speed 3-bit/cell Schottky barrier nanowire charge-trapping memories. - Wei Chang; Chun-Hsing Shih; Yan-Xiang Luo; Wen-Fa Wu; Chen-Hsin Lien (Microelectron. Reliab., 2015)

Short-channel effect and device design of extremely scaled tunnel field-effect transistors. - Nguyen Dang Chien; Chun-Hsing Shih (Microelectron. Reliab., 2015)

Different scalabilities of N- and P-type tunnel field-effect transistors with Si/SiGe heterojunctions. - Nguyen Dang Chien; Nguyen Thi Thu; Chun-Hsing Shih; Luu The Vinh (ICICDT, 2016)

Impact of gate-to-source/drain misalignments on source-side injection Schottky barrier charge-trapping memory cells evaluated using numerical programming-trapping iterations. - Chun-Hsing Shih; Yen-Hsiang Lo; Yu-Hsuan Chen; Jr-Jie Tsai (Microelectron. Reliab., 2017)