Efficient BISR Techniques for Word-Oriented Embedded Memories with Hierarchical Redundancy. - Shyue-Kung Lu; Chun-Lin Yang; Han-Wen Lin (ACIS-ICIS, 2006)

Efficient BISR Techniques for Embedded Memories Considering Cluster Faults. - Chun-Lin Yang; Yuang-Cheng Hsiao; Shyue-Kung Lu (PRDC, 2007)

Low-Power Built-In Self-Test Techniques for Embedded SRAMs. - Shyue-Kung Lu; Yuang-Cheng Hsiao; Chia-Hsiu Liu; Chun-Lin Yang (VLSI Design, 2007)

Efficient BISR Techniques for Embedded Memories Considering Cluster Faults. - Shyue-Kung Lu; Chun-Lin Yang; Yuang-Cheng Hsiao; Cheng-Wen Wu (IEEE Trans. Very Large Scale Integr. Syst., 2010)

An evidence combination model based on variable-precision rough sets. - Chun-Lin Yang (ICMLC, 2011)

A dual-edged triggered explicit-pulsed level converting flip-flop with a wide operation range. - Mei-Wei Chen; Ming-Hung Chang; Pei-Chen Wu; Yi-Ping Kuo; Chun-Lin Yang; Yuan-Hua Chu; Wei Hwang (SoCC, 2013)

A collision-analysis-based energy-efficient routing protocol in 3D underwater acoustic sensor networks. - Chun-Hao Yang; Kuo-Feng Ssu; Chun-Lin Yang (Comput. Commun., 2015)