A 650-pJ/bit MedRadio Transmitter With an FIR-Embedded Phase Modulator for Medical Micro-Power Networks (MMNs). - Yao-Hong Liu; Li-Guang Chen; Chun-Yu Lin 002; Tsung-Hsien Lin (IEEE Trans. Circuits Syst. I Regul. Pap., 2013)

A 4-GHz ΔΣ fractional-N frequency synthesizer with 2-dimensional quantization noise pushing and fractional spur elimination techniques. - Chun-Yu Lin 002; Tsung-Hsien Lin (A-SSCC, 2016)

A 330-µW 400-MHz BPSK Transmitter in 0.18- µm CMOS for Biomedical Applications. - Yi-Lin Tsai; Chun-Yu Lin 002; Bang-Cyuan Wang; Tsung-Hsien Lin (IEEE Trans. Circuits Syst. II Express Briefs, 2016)

A 1.5-GHz sub-sampling fractional-N PLL for spread-spectrum clock generator in 0.18-μm CMOS. - Chun-Yu Lin 002; Tun-Ju Wang; Tsung-Hsien Lin (A-SSCC, 2017)

An ultra-low power 169-nA 32.768-kHz fractional-N PLL. - Chun-Yu Lin 002; Tun-Ju Wang; Tzu-Hsuan Liu; Tsung-Hsien Lin (A-SSCC, 2017)

A 2.4-GHz 500-µW 370-fsrms Integrated Jitter Sub-Sampling Sub-Harmonically Injection-Locked PLL in 90-nm CMOS. - Chun-Yu Lin 002; Yu-Ting Hung; Tsung-Hsien Lin (A-SSCC, 2019)

A 1-200MHz Multiple Output Fractional Divider Using Phase Rotating Technique. - Chun-Yu Lin 002; Tun-Ju Wang; Yu-Ting Hung; Tsung-Hsien Lin (VLSI-DAT, 2020)

A ± 20-ppm -50°C-105°C 1-µA 32.768-kHz Clock Generator with a System-HFXO-Assisted Background Calibration. - Chun-Yu Lin 002; Yu-Wei Huang; Tsung-Hsien Lin (A-SSCC, 2021)

29.5 A 0.008mm2 1.5mW 0.625-to-200MHz Fractional Output Divider with 120fsrms Jitter Based on Replica-DTC-Free Background Calibration. - Chun-Yu Lin 002; Yu-Ting Hung; Tun-Ju Wang; Tsung-Hsien Lin (ISSCC, 2021)

A Temperature-Compensated Crystal Oscillator With Piecewise Polynomial Varactor Compensation Achieving ±3.75-ppm Inaccuracy From -30°C to 90°C. - Chun-Yu Lin 002; Yu-Wei Huang; Tsung-Hsien Lin (IEEE Trans. Circuits Syst. II Express Briefs, 2022)