Zero-Skew Driven for RLC Clock Tree Construction in SoC. - Chia-Chun Tsai; Jan-Ou Wu; Chung-Chieh Kuo; Trong-Yen Lee; Wen-Ta Lee (ICITA (1), 2005)

Tapping Point Numerical-Based Search for Exact Zero-Skew RLC Clock Tree Construction. - Chia-Chun Tsai; Jan-Ou Wu; Yu-Ting Shieh; Chung-Chieh Kuo; Trong-Yen Lee (APCCAS, 2006)

Zero-Skew Driven Buffered RLC Clock Tree Construction. - Jan-Ou Wu; Chia-Chun Tsai; Chung-Chieh Kuo; Trong-Yen Lee (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2007)

Layer assignment considering manufacturability in X-architecture clock tree. - Chia-Chun Tsai; Wei-Shi Lin; Jan-Ou Wu; Chung-Chieh Kuo; Trong-Yen Lee (CIT, 2008)

X-clock routing based on pattern matching. - Chia-Chun Tsai; Chung-Chieh Kuo; Jan-Ou Wu; Trong-Yen Lee; Rong-Shue Hsiao (SoCC, 2008)

Double-via insertion enhanced X-architecture clock routing for reliability. - Chia-Chun Tsai; Chung-Chieh Kuo; Lin-Jeng Gu; Trong-Yen Lee (ISCAS, 2010)

Antenna Violation Avoidance/Fixing for X-clock routing. - Chia-Chun Tsai; Chung-Chieh Kuo; Lin-Jeng Gu; Trong-Yen Lee (ISQED, 2010)

Post-Routing Double-Via Insertion for X-Architecture Clock Tree Yield Improvement. - Chia-Chun Tsai; Chung-Chieh Kuo; Trong-Yen Lee (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2011)

Pattern-matching-based X-architecture zero-skew clock tree construction with X-Flip technique and via delay consideration. - Chung-Chieh Kuo; Chia-Chun Tsai; Trong-Yen Lee (Integr., 2011)

Discharge-path-based antenna effect detection and fixing for X-architecture clock tree. - Chia-Chun Tsai; Chung-Chieh Kuo; Feng-Tzu Hsu; Trong-Yen Lee (Integr., 2012)