A rescheduling and fast pipeline VLSI architecture for lifting-based discrete wavelet transform. - Bing-Fei Wu; Chung-Fu Lin (ISCAS (2), 2003)

Analysis and architecture design for high performance JPEG2000 coprocessor. - Bing-Fei Wu; Chung-Fu Lin (ISCAS (2), 2004)

An efficient architecture for JPEG2000 coprocessor. - Bing-Fei Wu; Chung-Fu Lin (IEEE Trans. Consumer Electron., 2004)

A low memory QCB-based DWT for JPEG2000 coprocessor supporting large tile size. - Bing-Fei Wu; Chung-Fu Lin (ICASSP (5), 2005)

A high-performance and memory-efficient pipeline architecture for the 5/3 and 9/7 discrete wavelet transform of JPEG2000 codec. - Bing-Fei Wu; Chung-Fu Lin (IEEE Trans. Circuits Syst. Video Technol., 2005)

Memory-efficient architecture for JPEG 2000 coprocessor with large tile image. - Bing-Fei Wu; Chung-Fu Lin (IEEE Trans. Circuits Syst. II Express Briefs, 2006)

A Low-Cost Programmable Memory BIST Design for Multiple Memory Instances. - Chung-Fu Lin; Chia-Fu Huang; De-Chung Lu; Chih-Chiang Hsu; Wen-Tsung Chiu; Yu-Wei Chen; Yeong-Jar Chang (ITC, 2008)

A time-efficient particle swarm optimization-based codebook generation algorithm. - Chun-Wei Tsai; Chung-Fu Lin; Ming-Chao Chiang; Chu-Sing Yang (IEEE Congress on Evolutionary Computation, 2010)

An Efficient Pipeline Architecture and Memory Bit-Width Analysis for Discrete Wavelet Transform of the 9/7 Filter for JPEG 2000. - Chung-Fu Lin; Pei-Kung Huang; Bing-Fei Wu (J. Signal Process. Syst., 2010)