Post-silicon calibration of analog CMOS using phase-change memory cells. - Cheng-Yuan Wen; Jeyanandh Paramesh; Larry T. Pileggi; Jing Li 073; SangBum Kim; Jonathan E. Proesel; Chung Lam (ESSCIRC, 2011)

Phase change memory. - Jing Li 073; Chung Lam (Sci. China Inf. Sci., 2011)

Brain-like associative learning using a nanoscale non-volatile phase change synaptic device array. - Sukru Burc Eryilmaz; Duygu Kuzum; Rakesh Gnana David Jeyasingh; SangBum Kim; Matthew BrightSky; Chung Lam; H.-S. Philip Wong (CoRR, 2014)

Experimental Demonstration of Array-level Learning with Phase Change Synaptic Devices. - Sukru Burc Eryilmaz; Duygu Kuzum; Rakesh Gnana David Jeyasingh; SangBum Kim; Matthew BrightSky; Chung Lam; H.-S. Philip Wong (CoRR, 2014)

7.3 A resistance-drift compensation scheme to reduce MLC PCM raw BER by over 100× for storage-class memory applications. - Win-San Khwa; Meng-Fan Chang; Jau-Yi Wu; Ming-Hsiu Lee; Tzu-Hsiang Su; Keng-Hao Yang; Tien-Fu Chen; Tien-Yen Wang; Hsiang-Pang Li; Matthew BrightSky; SangBum Kim; Hsiang-Lam Lung; et al. (ISSCC, 2016)

Training a Probabilistic Graphical Model with Resistive Switching Electronic Synapses. - Sukru Burc Eryilmaz; Emre Neftci; Siddharth Joshi 001; SangBum Kim; Matthew BrightSky; Hsiang-Lan Lung; Chung Lam; Gert Cauwenberghs; H.-S. Philip Wong (CoRR, 2016)

Opportunities for Analog Coding in Emerging Memory Systems. - Jesse H. Engel; Sukru Burc Eryilmaz; SangBum Kim; Matthew BrightSky; Chung Lam; Hsiang-Lan Lung; Bruno A. Olshausen; H.-S. Philip Wong (CoRR, 2017)

A Resistance Drift Compensation Scheme to Reduce MLC PCM Raw BER by Over 100× for Storage Class Memory Applications. - Win-San Khwa; Meng-Fan Chang; Jau-Yi Wu; Ming-Hsiu Lee; Tzu-Hsiang Su; Keng-Hao Yang; Tien-Fu Chen; Tien-Yen Wang; Hsiang-Pang Li; Matthew J. BrightSky; SangBum Kim; Hsiang-Lam Lung; et al. (IEEE J. Solid State Circuits, 2017)

Reliability benefits of a metallic liner in confined PCM. - Wanki Kim; SangBum Kim; Robert L. Bruce; Fabio Carta; G. Fraczak; A. Ray; Chung Lam; Matthew BrightSky; Yu Zhu; T. Masuda; K. Suu; Yujun Xie; et al. (IRPS, 2018)

A SPICE Model of Phase Change Memory for Neuromorphic Circuits. - Xuhui Chen; Huifang Hu; Xiaoqing Huang; Weiran Cai; Ming Liu; Chung Lam; Xinnan Lin; Lining Zhang; Mansun Chan (IEEE Access, 2020)