A Low-Power Quadrature VCO and Its Application to a 0.6-V 2.4-GHz PLL. - Chung-Ting Lu; Hsieh-Hung Hsieh; Liang-Hung Lu (IEEE Trans. Circuits Syst. I Regul. Pap., 2010)

A 0.034mm2, 725fs RMS jitter, 1.8%/V frequency-pushing, 10.8-19.3GHz transformer-based fractional-N all-digital PLL in 10nm FinFET CMOS. - Chao-Chieh Li; Tsung-Hsien Tsai; Min-Shueh Yuan; Chia-Chun Liao; Chih-Hsien Chang; Tien-Chien Huang; Hsien-Yuan Liao; Chung-Ting Lu; Hung-Yi Kuo; Kenny Hsieh; Mark Chen 001; Augusto Ronchini Ximenes; et al. (VLSI Circuits, 2016)

A Compact Transformer-Based Fractional-N ADPLL in 10-nm FinFET CMOS. - Chao-Chieh Li; Min-Shueh Yuan; Chia-Chun Liao; Chih-Hsien Chang; Yu-Tso Lin; Tsung-Hsien Tsai; Tien-Chien Huang; Hsien-Yuan Liao; Chung-Ting Lu; Hung-Yi Kuo; Augusto Ronchini Ximenes; Robert Bogdan Staszewski (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)