A Self-Referred Clock Jitter Measurement Circuit in Wide Frequency Range. - Chung-Yi Li; Chia-yuan Chou; Tsin-Yuan Chang (ATS, 2006)

A chaos-based pseudo random number generator using timing-based reseeding method. - Chung-Yi Li; Jiung-Sheng Chen; Tsin-Yuan Chang (ISCAS, 2006)

An Efficient Area-Delay Product Design for MixColumns/InvMixColumns in AES. - Chung-Yi Li; Chih-Feng Chien; Jin-Hua Hong; Tsin-Yuan Chang (ISVLSI, 2008)

A Bidirectional WDM Transport System Based on RSOAs and Optoelectronic Feedback Technique. - Chun-Cheng Lin; Hai-Han Lu; Wen-Jeng Ho; Hsiao-Chun Peng; Chung-Yi Li (IEEE Commun. Lett., 2010)

Area-Effective and Power-Efficient Fixed-Width Booth Multipliers Using Generalized Probabilistic Estimation Bias. - Yuan-Ho Chen; Chung-Yi Li; Tsin-Yuan Chang (IEEE J. Emerg. Sel. Topics Circuits Syst., 2011)

A Probabilistic Estimation Bias Circuit for Fixed-Width Booth Multiplier and Its DCT Applications. - Chung-Yi Li; Yuan-Ho Chen; Tsin-Yuan Chang; Jyun-Neng Chen (IEEE Trans. Circuits Syst. II Express Briefs, 2011)

High Throughput DA-Based DCT With High Accuracy Error-Compensated Adder Tree. - Yuan-Ho Chen; Tsin-Yuan Chang; Chung-Yi Li (IEEE Trans. Very Large Scale Integr. Syst., 2011)

A Linear Ensemble of Individual and Blended Models for Music Rating Prediction. - Po-Lung Chen; Chen-Tse Tsai; Yao-Nan Chen; Ku-Chun Chou; Chun-Liang Li; Cheng-Hao Tsai; Kuan-Wei Wu; Yu-Cheng Chou; Chung-Yi Li; Wei-Shih Lin; Shu-Hao Yu; Rong-Bing Chiu; et al. (KDD Cup, 2012)

Novel Models and Ensemble Techniques to Discriminate Favorite Items from Unrated Ones for Personalized Music Recommendation. - Todd G. McKenzie; Chun-Sung Ferng; Yao-Nan Chen; Chun-Liang Li; Cheng-Hao Tsai; Kuan-Wei Wu; Ya-Hsuan Chang; Chung-Yi Li; Wei-Shih Lin; Shu-Hao Yu; Chieh-Yen Lin; Po-Wei Wang; et al. (KDD Cup, 2012)

Period Extension and Randomness Enhancement Using High-Throughput Reseeding-Mixing PRNG. - Chung-Yi Li; Yuan-Ho Chen; Tsin-Yuan Chang; Lih-Yuan Deng; Kiwing To (IEEE Trans. Very Large Scale Integr. Syst., 2012)

Matching users and items across domains to improve the recommendation quality. - Chung-Yi Li; Shou-De Lin (KDD, 2014)

A Fast Locking-in and Low Jitter PLLWith a Process-Immune Locking-in Monitor. - Chung-Yi Li; Chung-Len Lee; Ming-Hong Hu; Hwai-Pwu Chou (IEEE Trans. Very Large Scale Integr. Syst., 2014)

Recommending missing sensor values. - Chung-Yi Li; Wei-Lun Su; Todd G. McKenzie; Fu-Chun Hsu; Shou-De Lin; Jane Yung-jen Hsu; Phillip B. Gibbons (IEEE BigData, 2015)

A hybrid lightwave transmission system based on fiber-VLLC convergence. - Chung-Yi Li; Hai-Han Lu; Chun-Yu Lin; Min-Chou Chen; Jian-Hua Chen; Chien-An Chu (OFC, 2015)

A bidirectional 60-GHz/30-GHz/15-GHz wireless-over-fiber transmission system. - Chung-Yi Li; Hai-Han Lu; Peng-Chun Peng; Ting-Chien Lu; Bo-Rui Chen; Dai-Hua Lin (WOCC, 2015)

Fast locking adaptive PLL using Dual-Edge Phase-Frequency Detector. - Chung-Yi Li (Microelectron. J., 2015)

Zeroing of power supply noise sensitivity for ring oscillators operating from 1 to 4 GHz. - Chung-Yi Li; Bo-Xun Wu (Microelectron. J., 2017)

Optical-Based Underwater Communications. - Jen-Chieh Chang; Yun-Chieh Wang; De-Yu Chen; Chung-Yi Li; Hai-Han Lu; Xu-Hong Huang; Wen-Shing Tsai (OFC, 2018)

A 84 Gb/s VSB-PAM8 VCSEL-Based Fiber-FSO Convergence. - Yun-Chieh Wang; Pei-Hsien Chew; Yu-Bo Jheng; Chung-Yi Li; Hai-Han Lu; Xu-Hong Huang; Wen-Shing Tsai (OFC, 2018)

A 25-Gbps UWOC system with a two-stage injection-locked VCSEL transmitter and an afocal scheme. - Pei-Hsien Chew; De-Yu Chen; You-Ruei Wu; Zhen-Han Wang; Chung-Yi Li; Hai-Han Lu (WOCC, 2018)

Fine-Tuning Accuracy Using Conditional Probability of the Bottom Sign-Bit in Fixed-Width Modified Booth Multiplier. - Yuan-Ho Chen; Chung-Yi Li; Luhua Lai (Circuits Syst. Signal Process., 2018)

A Hybrid Internet/CATV/5G Fiber-FSO Integrated System With a Triple-Wavelength Polarization Multiplexing Scenario. - Chung-Yi Li; Hsiao-Wen Wu; Hai-Han Lu; Wen-Shing Tsai; Song-En Tsai; Jing-Yan Xie (IEEE Access, 2019)

Centralized-Light-Source Two-Way PAM8/PAM4 FSO Communications With Parallel Optical Injection Locking Operation. - Wen-Shing Tsai; Hai-Han Lu; Chung-Wei Su; Zhen-Han Wang; Chung-Yi Li (IEEE Access, 2019)

What Does a Network Layer Hear? Analyzing Hidden Representations of End-to-End ASR Through Speech Synthesis. - Chung-Yi Li; Pei-Chieh Yuan; Hung-yi Lee (ICASSP, 2020)

Language Representation in Multilingual BERT and its applications to improve Cross-lingual Generalization. - Chi-Liang Liu; Tsung-Yuan Hsu; Yung-Sung Chuang; Chung-Yi Li; Hung-yi Lee (CoRR, 2020)

Design and Implementation of Four-Switch Current Sensorless Control for Three-Phase PFC Converter. - Chung-Yi Li; Nan-Chih Chao; Hung-Chi Chen (IEEE Trans. Ind. Electron., 2020)

Simple and hardware-efficient row-based direct-mapping estimators in fixed-width modified Booth multipliers. - Chung-Yi Li; Yuan-Ho Chen; Lu-An Lai; Wen-Chi Ye; Jun Yang (Int. J. Circuit Theory Appl., 2021)

Single-Line Bidirectional Optical Add/Drop Multiplexer for Ring Topology Optical Fiber Networks. - Chung-Yi Li; Ching-Hung Chang; Zih-Guei Lin (Sensors, 2021)

A Bi-Directional Fiber-FSO-5G MMW/ 5G NR Sub-THz Converged System. - Poh-Suan Chang; Chen-Xuan Liu; Yan-Yu Lin; Chung-Yi Li; Hai-Han Lu (OFC, 2022)

A 60 GHz Rhombic Patch Array Antenna With High Gain, Low Sidelobe Level, and Reduced Array Area. - Chi-En Tsai; Huayan Jin; Chao-Hsiang Liao; Chung-Yi Li; Wei-Chih Chang; Huai-En Liu; Kuo-Sheng Chin (IEEE Access, 2022)

Integrated All-GaN Driver for High-voltage DC-DC Power Converters. - Chin Hsia; Chung-Yi Li; Deng-Fong Lu; Tzu-Yu Chen (ISOCC, 2023)

Robust Cascaded Boost Converter with See-Saw Stress-Relief Control. - Chung-Yi Li; Tzu-Yu Chen; Deng-Fong Lu; Yue-Liang Chou; Hung-Chi Chen; Shinn-Yn Lin (ISOCC, 2023)

Bi-Directional 5G NR Fiber-Wireless Systems with Single-Carrier Optical Modulation and Phase Modulation Scheme. - Yu-Shen Lin; Wei-Cheng Fan; Cheng-Jun Lin; Chung-Yi Li; Hai-Han Lu (OFC, 2023)

Interactive Analog IC Layout Tool with Real-time Parasitic-aware Automatic Routing Assistance. - Yu-Tzu Chen; Chin-Fu Nien; Chin Hsia; Chung-Yi Li (APCCAS, 2024)

Low-latency and power-efficient row-based binary-weighted compensator for fixed-width Booth multiplier. - Chung-Yi Li; Hong-Chi Hu; Yuan-Ho Chen; Shinn-Yn Lin (Int. J. Circuit Theory Appl., 2025)