Provably good algorithm for low power consumption with dual supply voltages. - Chunhong Chen; Majid Sarrafzadeh (ICCAD, 1999)

An Effective Algorithm for Gate-Level Power-Delay Tradeoff Using Two Voltages. - Chunhong Chen; Majid Sarrafzadeh (ICCD, 1999)

Power reduction by simultaneous voltage scaling and gate sizing. - Chunhong Chen; Majid Sarrafzadeh (ASP-DAC, 2000)

Potential Slack: An Effective Metric of Combinational Circuit Performance. - Chunhong Chen; Xiaojian Yang; Majid Sarrafzadeh (ICCAD, 2000)

Timing driven gate duplication in technology independent phase. - Ankur Srivastava 001; Chunhong Chen; Majid Sarrafzadeh (ASP-DAC, 2001)

Activity-driven clock design. - Amir H. Farrahi; Chunhong Chen; Ankur Srivastava 001; Gustavo E. Téllez; Majid Sarrafzadeh (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001)

On gate level power optimization using dual-supply voltages. - Chunhong Chen; Ankur Srivastava 001; Majid Sarrafzadeh (IEEE Trans. Very Large Scale Integr. Syst., 2001)

Power Optimization of Delay Constrained Circuits. - Anshuman Nayak; Malay Haldar; Prith Banerjee; Chunhong Chen; Majid Sarrafzadeh (VLSI Design, 2001)

Power-Manageable Scheduling Technique for Control Dominated High-Level Synthesis. - Chunhong Chen; Majid Sarrafzadeh (DATE, 2002)

Activity-sensitive clock tree construction for low power. - Chunhong Chen; Changjun Kang; Majid Sarrafzadeh (ISLPED, 2002)

Physical design with multiple on-chip voltages. - Chunhong Chen (ISPD, 2002)

Probabilistic Analysis of Rectilinear Steiner Trees. - Chunhong Chen (ASP-DAC/VLSI Design, 2002)

Budget Management with Applications. - Chunhong Chen; Elaheh Bozorgzadeh; Ankur Srivastava 001; Majid Sarrafzadeh (Algorithmica, 2002)

Predicting potential performance for digital circuits. - Chunhong Chen; Xiaojian Yang; Majid Sarrafzadeh (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002)

Probability-based approach to rectilinear Steiner tree problems. - Chunhong Chen; Jiang Zhao; Majid Ahmadi (IEEE Trans. Very Large Scale Integr. Syst., 2002)

A semi-Gray encoding algorithm for low-power state assignment. - Chunhong Chen; Jiang Zhao; Majid Ahmadi (ISCAS (5), 2003)

Evaluating and optimizing power consumption of anti-collision protocols for applications in RFID systems. - Feng Zhou; Chunhong Chen; Dawei Jin; Chenling Huang; Hao Min (ISLPED, 2004)

Timing driven gate duplication. - Ankur Srivastava 001; Ryan Kastner; Chunhong Chen; Majid Sarrafzadeh (IEEE Trans. Very Large Scale Integr. Syst., 2004)

A Novel State Encoding Algorithm for Low Power Implementation. - Chunhong Chen; Jiang Zhao; Majid Ahmadi (J. Circuits Syst. Comput., 2005)

Performance Evaluation and Optimization of Full Adders with Single-Electron Technology. - Yanjie Mao; Chunhong Chen (CCECE, 2006)

Power-oriented delay budgeting for combinational circuits. - Jialin Mi; Chunhong Chen; H. K. Kwan (ISCAS, 2006)

Finite State Machine Implementation with Single-Electron Tunneling Technology. - Jialin Mi; Chunhong Chen (ISVLSI, 2006)

Power-Oriented Delay Budgeting for Combinational Circuits. - Jialin Mi; Chunhong Chen (ISVLSI, 2006)

A low-power CMOS analog multiplier. - Chunhong Chen; Zheng Li (IEEE Trans. Circuits Syst. II Express Briefs, 2006)

Quasi-Static Energy Recovery Logic with Single Power-Clock Supply. - Shun Li 002; Feng Zhou; Chunhong Chen; Hua Chen; Yipin Wu (ISCAS, 2007)

Protocol-level performance analysis for anti-collision protocols in RFID systems. - Mohammed Berhea; Chunhong Chen; Q. M. Jonathan Wu (ISCAS, 2008)

An experimental study on multi-island structures for single-electron tunneling based threshold logic. - Venketeshwaran Puthucode; Chunhong Chen (ISCAS, 2008)

Power-management-based Chien search for low power BCH decoder. - Shu-Yi Wong; Chunhong Chen; Q. M. Jonathan Wu (ISLPED, 2009)

Parameter optimization for growth model of greenhouse crop using genetic algorithms. - Chunni Dai; Meng Yao; Zhujie Xie; Chunhong Chen; Jingao Liu (Appl. Soft Comput., 2009)

Power efficient multi-stage CMOS rectifier design for UHF RFID tags. - Shu-Yi Wong; Chunhong Chen (Integr., 2011)

Low Power Chien Search for BCH Decoder Using RT-Level Power Management. - Shu-Yi Wong; Chunhong Chen; Q. M. Jonathan Wu (IEEE Trans. Very Large Scale Integr. Syst., 2011)

An ultra-low power voltage regulator for RFID application. - Chia-Chin Liu; Chunhong Chen (MWSCAS, 2013)

Binary Multiplication Using Hybrid MOS and Multi-Gate Single-Electron Transistors. - Guoqing Deng; Chunhong Chen (IEEE Trans. Very Large Scale Integr. Syst., 2013)

A SET/MOS Hybrid Multiplier Using Frequency Synthesis. - Guoqing Deng; Chunhong Chen (IEEE Trans. Very Large Scale Integr. Syst., 2013)

Implementation of the conscience mechanism using single-electron transfer in competitive learning. - Ran Xiao; Chunhong Chen (ISCAS, 2014)

Gate-Level Circuit Reliability Analysis: A Survey. - Ran Xiao; Chunhong Chen (VLSI Design, 2014)

Power optimization design for probabilistic logic circuits. - Ran Xiao; Chunhong Chen (ISCAS, 2015)

A fast model for analysis and improvement of gate-level circuit reliability. - Chunhong Chen; Ran Xiao (Integr., 2015)

Circuit Reliability Analysis Using Signal Reliability Correlations. - Jinchen Cai; Chunhong Chen (QRS Companion, 2017)

A Triple-Point Model for Circuit-Level Reliability Analysis. - Chunhong Chen; Jinchen Cai; Suoyue Zhan (ISCAS, 2018)

Modeling and Application for Negative-Differential-Conductance Devices with Single-Electron Technology. - Lin Li; Chunhong Chen (MWSCAS, 2018)

Allocating Gate Reliability for Circuit Reliability Optimization. - Suoyue Zhan; Khawja Sikander; Chunhong Chen (MWSCAS, 2019)

Area-Efficient Finite Field Multiplication in $ text{GF} (2^{n})$ Using Single-Electron Transistors. - Chen Zhang; Chunhong Chen; Huapeng Wu (APCCAS, 2021)

An Analytical Model for Circuit Reliability Estimation. - Khawja Sikander; Suoyue Zhan; Chunhong Chen (MWSCAS, 2021)

A Hybrid Method for Signal Probability Estimation with Combinational Circuits. - Chunhong Chen; Suoyue Zhan (APCCAS, 2022)

An Efficient Method for Sequential Circuit Reliability Estimation. - Suoyue Zhan; Chunhong Chen (MWSCAS, 2022)

Circuit Reliability Analysis with Considerations of Aging Effect. - Suoyue Zhan; Chunhong Chen (SBCCI, 2022)

A hybrid method for signal probability and reliability estimation with combinational circuits. - Suoyue Zhan; Chunhong Chen (Integr., 2022)

Area-Efficient Finite Field Multiplication Using Hybrid SET-MOS Technology. - Chen Zhang; Huapeng Wu; Chunhong Chen (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)