Analog Computation With Random Pulse Sequences - Chushin Afuso (1968)

Design of low-power quaternary CMOS logic circuits. - Chotei Zukeran; Chushin Afuso; Michitaka Kameyama; Tatsuo Higuchi 001 (Syst. Comput. Jpn., 1986)

Design of micropower CMOS quaternary memory circuits. - Chotei Zukeran; Chushin Afuso; Michitaka Kameyama; Tatsuo Higuchi 001 (Syst. Comput. Jpn., 1987)

A State Assignment for p-Valued Sequential Machines. - Yasunori Nagata; Chotei Zukeran; Chushin Afuso (Syst. Comput. Jpn., 1990)

A universal literal circuit and its application to quaternary logic networks. - Chotei Zukeran; Yasunori Nagata; Chushin Afuso; Makoto Honda; Yutaka Nagamine (Syst. Comput. Jpn., 1992)

A Method of Test Pattern Generation for Multiple-Valued PLA's. - Yasunori Nagata; Chushin Afuso (ISMVL, 1993)

An Optimum Half-Hot Code Assignment Algorithm for Input Encoding and Its Application to Finite State Machines. - Yasunori Nagata; Masao Mukaidono; Chushin Afuso (IEICE Trans. Inf. Syst., 1995)