Synthesis of networks on chips for 3D systems on chips. - Srinivasan Murali; Ciprian Seiculescu; Luca Benini; Giovanni De Micheli (ASP-DAC, 2009)

NoC topology synthesis for supporting shutdown of voltage islands in SoCs. - Ciprian Seiculescu; Srinivasan Murali; Luca Benini; Giovanni De Micheli (DAC, 2009)

SunFloor 3D: A tool for Networks On Chip topology synthesis for 3D systems on chips. - Ciprian Seiculescu; Srinivasan Murali; Luca Benini; Giovanni De Micheli (DATE, 2009)

A floorplan-aware interactive tool flow for NoC design and synthesis. - Mohammad Reza Kakoee; Federico Angiolini; Srinivasan Murali; Antonio Pullini; Ciprian Seiculescu; Luca Benini (SoCC, 2009)

Networks on Chips: from research to products. - Giovanni De Micheli; Ciprian Seiculescu; Srinivasan Murali; Luca Benini; Federico Angiolini; Antonio Pullini (DAC, 2010)

A method to remove deadlocks in Networks-on-Chips with Wormhole flow control. - Ciprian Seiculescu; Srinivasan Murali; Luca Benini; Giovanni De Micheli (DATE, 2010)

SunFloor 3D: A Tool for Networks on Chip Topology Synthesis for 3-D Systems on Chips. - Ciprian Seiculescu; Srinivasan Murali; Luca Benini; Giovanni De Micheli (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010)

Comparative Analysis of NoCs for Two-Dimensional Versus Three-Dimensional SoCs Supporting Multiple Voltage and Frequency Islands. - Ciprian Seiculescu; Srinivasan Murali; Luca Benini; Giovanni De Micheli (IEEE Trans. Circuits Syst. II Express Briefs, 2010)

Design and Analysis of NoCs for Low-Power 2D and 3D SoCs. - Ciprian Seiculescu; Srinivasan Murali; Luca Benini; Giovanni De Micheli (Low Power Networks-on-Chip, 2011)

A DRAM Centric NoC Architecture and Topology Design Approach. - Ciprian Seiculescu; Srinivasan Murali; Luca Benini; Giovanni De Micheli (ISVLSI, 2011)

3D Network on Chip Topology Synthesis: Designing Custom Topologies for Chip Stacks. - Ciprian Seiculescu; Srinivasan Murali; Luca Benini; Giovanni De Micheli (3D Integration for NoC-based SoC Architectures, 2011)

A distributed interleaving scheme for efficient access to WideIO DRAM memory. - Ciprian Seiculescu; Luca Benini; Giovanni De Micheli (CODES+ISSS, 2012)

CCNoC: Specializing On-Chip Interconnects for Energy Efficiency in Cache-Coherent Servers. - Stavros Volos; Ciprian Seiculescu; Boris Grot; Naser Khosro Pour; Babak Falsafi; Giovanni De Micheli (NOCS, 2012)

Design Methods and Tools for Application-Specific Predictable Networks-on-Chip. - Ciprian Seiculescu (2012)

3.5-D integration: A case study. - Shashikanth Bobba; Pierre-Emmanuel Gaillardon; Ciprian Seiculescu; Vasilis F. Pavlidis; Giovanni De Micheli (ISCAS, 2013)

Designing best effort networks-on-chip to meet hard latency constraints. - Ciprian Seiculescu; Dara Rahmati; Srinivasan Murali; Hamid Sarbazi-Azad; Luca Benini; Giovanni De Micheli (ACM Trans. Embed. Comput. Syst., 2013)

Evaluation of Tracking Algorithms for Contrast Enhanced Ultrasound Imaging Exploration. - Cristina Laura Sîrbu; Ciprian Seiculescu; Ghita Adrian Burdan; Tudor Moga; Catalin-Daniel Caleanu (ACSW, 2022)

Benchmarking TensorFlow Lite Quantization Algorithms for Deep Neural Networks. - Ioan Lucan Orasan; Ciprian Seiculescu; Catalin-Daniel Caleanu (SACI, 2022)