A burn-in tolerant dynamic circuit technique. - Atila Alvandpour; Ram Krishnamurthy 001; Shekhar Borkar; A. Rahman; Clair Webb (CICC, 2002)

3D Processing Technology and Its Impact on iA32 Microprocessors. - Bryan Black; Donald Nelson; Clair Webb; Nick Samra (ICCD, 2004)

Die Stacking (3D) Microarchitecture. - Bryan Black; Murali Annavaram; Ned Brekelbaum; John DeVale; Lei Jiang; Gabriel H. Loh; Don McCaule; Patrick Morrow; Donald W. Nelson; Daniel Pantuso; Paul Reed; Jeff Rupley; et al. (MICRO, 2006)

Process, Temperature, and Supply-Noise Tolerant 45nm Dense Cache Arrays With Diffusion-Notch-Free (DNF) 6T SRAM Cells and Dynamic Multi-Vcc Circuits. - Muhammad M. Khellah; Nam-Sung Kim; Yibin Ye; Dinesh Somasekhar; Tanay Karnik; Nitin Borkar; Gunjan Pandya; Fatih Hamzaoglu; Tom Coan; Yih Wang; Kevin Zhang 001; Clair Webb; et al. (IEEE J. Solid State Circuits, 2009)

How to reduce power in 3D IC designs: A case study with OpenSPARC T2 core. - Moongon Jung; Taigon Song; Yang Wan; Young-Joon Lee; Debabrata Mohapatra; Hong Wang; Greg Taylor; Devang Jariwala; Vijay Pitchumani; Patrick Morrow; Clair Webb; Paul Fischer; et al. (CICC, 2013)