Formale Verifikation der Register-Allokation. - Claudia Blank; Gerd Ritter; Holger Hinrichsen; Hans Eveking (MBMV, 2000)

Symbolic simulation techniques-state-of-the-art and applications. - Claudia Blank; Hans Eveking; Jens Levihn; Gerd Ritter (HLDVT, 2001)

Property verification of mixed data and control intensive designs. - Claudia Blank (dissertation.de, 2003)

Employment of Property Checking for Functional Hardware Verification in an Industrial Setting. - Claudia Blank (MBMV, 2007)