8912-bit Montgomery multipliers using radix-8 booth encoding and coded-digit. - Claudia Patricia Renteria-Mejia; Vladimir Trujillo-Olaya; Jaime Velasco-Medina (LASCAS, 2013)

Hardware implementation of the Smith-Waterman algorithm using a systolic architecture. - Juan M. Marmolejo-Tejada; Vladimir Trujillo-Olaya; Claudia Patricia Renteria-Mejia; Jaime Velasco-Medina (LASCAS, 2014)

Hardware design of FFT polynomial multipliers. - Claudia Patricia Renteria-Mejia; Alexander López-Parrado; Jaime Velasco-Medina (LASCAS, 2014)

High-Throughput Ring-LWE Cryptoprocessors. - Claudia Patricia Renteria-Mejia; Jaime Velasco-Medina (IEEE Trans. Very Large Scale Integr. Syst., 2017)

Lattice-Based Cryptoprocessor for CCA-Secure Identity-Based Encryption. - Claudia Patricia Renteria-Mejia; Jaime Velasco-Medina (IEEE Trans. Circuits Syst. I Regul. Pap., 2020)