Realization of a three-valued logic built-in testing structure. - Côme Rozon; Hussein T. Mouftah (IEEE J. Solid State Circuits, 1990)

Testability Analysis of CMOS Temary Circuits. - Côme Rozon; Hussein T. Mouftah (ISMVL, 1991)

Testability analysis and fault modeling of BiCMOS circuits. - Dhamin Al-Khalili; Côme Rozon; B. Stewart (J. Electron. Test., 1992)

Fault Characterization and Testability Analysis of Emitter Coupled Logic and Comparison with CMOS & BiCMOS Circuits. - Michael Ogbonna Esonu; Dhamin Al-Khalili; Côme Rozon (VLSI Design, 1994)

Improved VLSI Design for Decoding Concatenated Codes Comprising an Irreducible Cyclic Code and a Reed-Solomon Code. - D. B. Gravel; Germain Drolet; Côme Rozon (Information Theory and Applications, 1995)

On the Use of VHDL as a Multi-Valued Logic Simulator. - Côme Rozon (ISMVL, 1996)

VHDL Modelling and Analysis of Fault Secure Systems. - Jason Coppens; Dhamin Al-Khalili; Côme Rozon (DATE, 1998)

Comprehensive Defect Analysis and Defect Coverage of CMOS Circuits. - Dhamin Al-Khalili; Saman Adham; Côme Rozon; Moazzem Hossain; Douglas Racz (DFT, 1998)

Comparing defect coverage for current-mode logic and CMOS VLSI cells. - Côme Rozon; Dhamin Al-Khalili; Saman Adham; Douglas Racz (ICECS, 2000)

Comprehensive defect analysis and testability of current-mode logic circuits. - Saman Adham; Dhamin Al-Khalili; Côme Rozon; Douglas Racz (ISCAS, 2000)

Accurate CMOS Bridge Fault Modeling with Neural Network-Based VHDL Saboteurs. - Donald B. Shaw; Dhamin Al-Khalili; Côme Rozon (ICCAD, 2001)

Deriving accurate ASIC cell fault models for VITAL compliant VHDL simulation. - Donald B. Shaw; Dhamin Al-Khalili; Côme Rozon (ISCAS (5), 2001)

Fault security analysis of CMOS VLSI circuits using defect-injectable VHDL models. - Donald B. Shaw; Dhamin Al-Khalili; Côme Rozon (Integr., 2002)

IC Bridge Fault Modeling for IP Blocks Using Neural Network-Based VHDL Saboteurs. - Donald B. Shaw; Dhamin Al-Khalili; Côme Rozon (IEEE Trans. Computers, 2003)

Leakage power dissipation in UDSM logic gates. - Hussam Al-Hertani; Dhamin Al-Khalili; Côme Rozon (Circuits, Signals, and Systems, 2005)

Accurate Total Static Leakage Current Estimation in Transistor Stacks. - Hussam Al-Hertani; Dhamin Al-Khalili; Côme Rozon (AICCSA, 2006)

Automatic generation of defect injectable VHDL fault models for ASIC standard cell libraries. - Donald B. Shaw; Dhamin Al-Khalili; Côme Rozon (Integr., 2006)

UDSM subthreshold leakage model for NMOS transistor stacks. - Hussam Al-Hertani; Dhamin Al-Khalili; Côme Rozon (Microelectron. J., 2008)

A CNFET-based characterization framework for digital circuits. - Jacques Laurent Athow; Côme Rozon; Dhamin Al-Khalili; J. M. Pierre Langlois (ICECS, 2011)

Ultra low leakage structures for logic circuits using symmetric and asymmetric FinFETs. - Farid Moshgelani; Dhamin Al-Khalili; Côme Rozon (NEWCAS, 2012)

Ultra-Low Leakage Arithmetic Circuits Using Symmetric and Asymmetric FinFETs. - Farid Moshgelani; Dhamin Al-Khalili; Côme Rozon (J. Electr. Comput. Eng., 2013)