On Hard Adders and Carry Chains in FPGAs. - Jason Luu; Conor McCullough; Sen Wang; Safeen Huda; Bo Yan; Charles Chiasson; Kenneth B. Kent; Jason Helge Anderson; Jonathan Rose; Vaughn Betz (FCCM, 2014)

Optimizing FPGA Logic Block Architectures for Arithmetic. - Kevin E. Murray; Jason Luu; Matthew J. P. Walker; Conor McCullough; Sen Wang; Safeen Huda; Bo Yan; Charles Chiasson; Kenneth B. Kent; Jason Helge Anderson; Jonathan Rose; Vaughn Betz (IEEE Trans. Very Large Scale Integr. Syst., 2020)

PikeLPN: Mitigating Overlooked Inefficiencies of Low-Precision Neural Networks. - Marina Neseem; Conor McCullough; Randy Hsin; Chas Leichner; Shan Li 001; In Suk Chong; Andrew G. Howard; Lukasz Lew; Sherief Reda; Ville-Mikko Rautio; Daniele Moro (CVPR, 2024)