A 6 GHz, 1.8 V, divide-by-2 circuit implemented in silicon bipolar technology. - Costantino Pala; Gerd Schuppener; Mehran Mokhtari (ISCAS (2), 1999)

Investigation on low-voltage low-power silicon bipolar design topology for high-speed digital circuits. - Gerd Schuppener; Costantino Pala; Mehran Mokhtari (IEEE J. Solid State Circuits, 2000)

A high-speed electro-optical analog-to-digital converter principle. - Costantino Pala; Lars Thylén; Mehrun Mokhtari; Urban Westergren (ISCAS (1), 2001)

A digital single-wire multiswitch (DSWM) channel-stacking IC in 45nm CMOS for satellite outdoor units. - Weinan Gao; Bill Huff; Kendal Hess; Didier Coulibaly; Costantino Pala; Jiang Cao; Jaspreet Bhatia; Mikko Waltari; Lior Levin; Cyrille Cathelin; Thierry Nouvet; Nitin Nidhi; et al. (ISSCC, 2013)