Sharing BIST with Multiple Cores for System-on-a-Chip. - Huaguo Liang; Cuiyun Jiang (Asian Test Symposium, 2003)

A BIST Scheme Based on Selecting State Generation of Folding Counters. - Huaguo Liang; Maoxiang Yi; Xiangsheng Fang; Cuiyun Jiang (Asian Test Symposium, 2005)

Block Marking and Updating Coding in Test Data Compression for SoC. - Lei Zhang 008; Huaguo Liang; Wenfa Zhan; Cuiyun Jiang (ATS, 2007)

Optimal LFSR-Coding Test Data Compression Based on Test Cube Dividing. - Maoxiang Yi; Huaguo Liang; Kaihua Zhan; Cuiyun Jiang (CSE (2), 2009)

A Test Vector Compression/Decompression Scheme Based on Logic Operation between Adjacent Bits (LOBAB) Coding. - Huaguo Liang; Wenfa Zhan; Qiang Luo; Cuiyun Jiang (PRDC, 2009)

A scheme of test data compression based on coding of even bits marking and selective output inversion. - Wenfa Zhan; Huaguo Liang; Cuiyun Jiang; Zhengfeng Huang; Aiman H. El-Maleh (Comput. Electr. Eng., 2010)

A Self-Recoverable, Frequency-Aware and Cost-Effective Robust Latch Design for Nanoscale CMOS Technology. - Aibin Yan; Huaguo Liang; Zhengfeng Huang; Cuiyun Jiang; Maoxiang Yi (IEICE Trans. Electron., 2015)

An SEU resilient, SET filterable and cost effective latch in presence of PVT variations. - Aibin Yan; Huaguo Liang; Zhengfeng Huang; Cuiyun Jiang; Yiming Ouyang; Xuejun Li (Microelectron. Reliab., 2016)

A single event transient detector in SRAM-based FPGAs. - Xiumin Xu; Huaguo Liang; Zhengfeng Huang; Cuiyun Jiang; Yingchun Lu; Aibin Yan; Tianming Ni; Maoxiang Yi (IEICE Electron. Express, 2017)

A highly reliable butterfly PUF in SRAM-based FPGAs. - Xiumin Xu; Huaguo Liang; Zhengfeng Huang; Cuiyun Jiang; Yiming Ouyang; Xiangsheng Fang; Tianming Ni; Maoxiang Yi (IEICE Electron. Express, 2017)

A Pulse Shrinking-Based Test Solution for Prebond Through Silicon via in 3-D ICs. - Maoxiang Yi; Jingchang Bian; Tianming Ni; Cuiyun Jiang; Hao Chang; Huaguo Liang (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019)

Jitter-Quantizing-Based TRNG Robust Against PVT Variations. - Yingchun Lu; Huaguo Liang; Liang Yao; Xinyu Wang; Haochen Qi; Maoxiang Yi; Cuiyun Jiang; Zhengfeng Huang (IEEE Access, 2020)

A N: 1 Single-Channel TDMA Fault-Tolerant Technique for TSVs in 3D-ICs. - Huaguo Liang; Danqing Li; Zhao Yang; Tianming Ni; Zhengfeng Huang; Cuiyun Jiang (ITC-Asia, 2021)

Approximate multipliers based on a novel unbiased approximate 4-2 compressor. - Bao Fang; Huaguo Liang; Dawen Xu 002; Maoxiang Yi; Yongxia Sheng; Cuiyun Jiang; Zhengfeng Huang; Yingchun Lu (Integr., 2021)

M-RO PUF: A portable pure digital RO PUF based on MUX unit. - Liang Yao; Huaguo Liang; Qian Han; Hong Zhang; Zhengfeng Huang; Cuiyun Jiang; Maoxiang Yi; Yingchun Lu (Microelectron. J., 2022)

Design of approximate Booth multipliers based on error compensation. - Yongxia Sheng; Huaguo Liang; Bao Fang; Cuiyun Jiang; Zhengfeng Huang; Maoxiang Yi; Yingchun Lu (Integr., 2023)

Machine Learning-Based Diagnosis of Defects in Chiplet Interconnects. - Junming Li; Huaguo Liang; Xianrui Dou; Le Yu; Zhengfeng Huang; Yingchun Lu; Cuiyun Jiang (3DIC, 2024)

MTCX: Ultra-high Throughput TRNG Based on Mesh topology of Coupled-XOR. - Yingchun Lu; Enpu Xu; Huaguo Liang; Cuiyun Jiang; Lixiang Ma; Liang Yao (ATS, 2024)

TNURML: Triple-Node-Upset-Recovery Magnetic Latch Design with Non-Volatility for Aerospace Applications. - Aibin Yan; Zhiyuan Pei; Xing Guo; Jie Song; Cuiyun Jiang; Huaguo Liang; Xiaoqing Wen; Patrick Girard 001 (ISCAS, 2025)