HVCRouter: Energy Efficient Network-on-Chip Router with Heterogeneous Virtual Channels. - Ji Wu 006; Xiangke Liao; Dezun Dong; Wang Li 003; Cunlu Li (ICA3PP (1), 2015)

MBL: A Multi-stage Bufferless High-radix Router. - Wenxiang Yang; Dezun Dong; Jingyue Zhao; Cunlu Li (CLUSTER, 2016)

RoB-Router: Low Latency Network-on-Chip Router Microarchitecture Using Reorder Buffer. - Cunlu Li; Dezun Dong; Xiangke Liao; Ji Wu 006; Fei Lei (Hot Interconnects, 2016)

CCAS: Contention and congestion aware switch allocation for network-on-chips. - Cunlu Li; Dezun Dong; Xiangke Liao; Fei Lei; Ji Wu 006 (ICCD, 2016)

Discovering Multi-type Correlated Events with Time Series for Exception Detection of Complex Systems. - Peng Xun; Peidong Zhu; Cunlu Li; Haoyang Zhu (ICDM Workshops, 2016)

Galaxyfly: A Novel Family of Flexible-Radix Low-Diameter Topologies for Large-Scales Interconnection Networks. - Fei Lei; Dezun Dong; Xiangke Liao; Xing Su 004; Cunlu Li (ICS, 2016)

Exploiting contention and congestion aware switch allocation in network-on-chips. - Cunlu Li; Dezun Dong; Xiangke Liao (ACM TUR-C, 2017)

Eca-Router : On Achieving Endpoint Congestion Aware Switch Allocation in the On-Chip Network. - Cunlu Li; Dezun Dong; Xiangke Liao (ICCD, 2018)

BFRP: Endpoint Congestion Avoidance Through Bilateral Flow Reservation. - Tianye Yang; Dezun Dong; Cunlu Li; Liquan Xiao (IPCCC, 2018)

CRSP: Network Congestion Control through Credit Reservation. - Tianye Yang; Dezun Dong; Cunlu Li; Liquan Xiao (ISPA/IUCC/BDCloud/SocialCom/SustainCom, 2018)

RoB-Router : A Reorder Buffer Enabled Low Latency Network-on-Chip Router. - Cunlu Li; Dezun Dong; Zhonghai Lu; Xiangke Liao (IEEE Trans. Parallel Distributed Syst., 2018)

Network Congestion Avoidance through Packet-chaining Reservation. - Ke Wu 003; Dezun Dong; Cunlu Li; Shan Huang 002; Yi Dai (ICPP, 2019)

DeepHiR: improving high-radix router throughput with deep hybrid memory buffer microarchitecture. - Cunlu Li; Dezun Dong; Xiangke Liao; John Kim 001; Changhyun Kim (ICS, 2019)

HARE: History-Aware Adaptive Routing Algorithm for Endpoint Congestion in Networks-on-Chip. - Kang Jin; Cunlu Li; Dezun Dong; Binzhang Fu (Int. J. Parallel Program., 2019)

DBM: A Dimension-Bubble-Based Multicast Routing Algorithm for 2D Mesh Network-on-Chips. - Canwen Xiao; Hui Lou; Cunlu Li; Kang Jin (ACA, 2020)

DancerFly: An Order-Aware Network-on-Chip Router On-the-Fly Mitigating Multi-path Packet Reordering. - Kang Jin; Dezun Dong; Cunlu Li; Libo Huang; Sheng Ma; Binzhang Fu (Int. J. Parallel Program., 2020)

PAARD: Proximity-Aware All-Reduce Communication for Dragonfly Networks. - Junchao Ma; Dezun Dong; Cunlu Li; Ke Wu 003; Liquan Xiao (ISPA/BDCloud/SocialCom/SustainCom, 2021)

Evaluation of Topology-Aware All-Reduce Algorithm for Dragonfly Networks. - Junchao Ma; Dezun Dong; Cunlu Li; Ke Wu 003; Liquan Xiao (NPC, 2021)

CIB-HIER: Centralized Input Buffer Design in Hierarchical High-radix Routers. - Cunlu Li; Dezun Dong; Shazhou Yang; Xiangke Liao; Guangyu Sun 003; Yongheng Liu (ACM Trans. Archit. Code Optim., 2021)

THperf: Enabling Accurate Network Latency Measurement for Tianhe-2 System. - Yunyang Xu; Ke Wu 003; Dezun Dong; Cunlu Li; Liquan Xiao (HPCC/DSS/SmartCity/DependSys, 2022)

Revisiting network congestion avoidance through adaptive packet-chaining reservation. - Ke Wu 003; Dezun Dong; Cunlu Li; Weixia Xu (Comput. Networks, 2022)

MUA-Router: Maximizing the Utility-of-Allocation for On-chip Pipelining Routers. - Cunlu Li; Dezun Dong; Xiangke Liao (ACM Trans. Archit. Code Optim., 2022)

Hybrid Memory Buffer Microarchitecture for High-Radix Routers. - Cunlu Li; Dezun Dong; Xiangke Liao; John Kim 001 (IEEE Trans. Computers, 2022)

DeTAR: A Decision Tree-Based Adaptive Routing in Networks-on-Chip. - Xiaoyun Zhang; Yaohua Wang; Dezun Dong; Cunlu Li; Shaocong Wang; Liquan Xiao (Euro-Par, 2023)

Poster Abstract: A Network-on-Chip Router Architecture for Industrial Internet-of-Thing Gateways. - Chenglong Li 007; Cunlu Li; Wenwen Fu; Tao Li 008; Baosheng Wang (IPSN, 2023)

LARE: A Linear Approximate Reinforcement Learning Based Adaptive Routing for Network-on-Chips. - Shaocong Wang; Xiaoyun Zhang; Dezun Dong; Cunlu Li; Zicong Wang; Zongmao Zhang (ISCAS, 2023)

A Deterministic Embedded End-System Tightly Coupled With TSN Schedule. - Chenglong Li 007; Zonghui Li; Tao Li 008; Cunlu Li; Baosheng Wang (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

AQC: Achieving Precise Bandwidth Allocation with Augmented Queues for Credit-Based Proactive Congestion Control. - Zihan Li; Yani Gong; Dinghuang Hu; Cunlu Li; Guoyuan Yuan; Dezun Dong (ICA3PP (3), 2024)

Xraytest: An X-ray Test system for finding faults of RDMA-NIC Design and Implementation. - Peng Xun; Tao Li; Yulei Yuan; Hui Yang; Cunlu Li (NAIC, 2024)

DRLAR: A deep reinforcement learning-based adaptive routing framework for network-on-chips. - Shaocong Wang; Xiaoyun Zhang; Changhong Wang; Ke Wu 003; Cunlu Li; Dezun Dong (Comput. Networks, 2024)

A survey of machine learning for Network-on-Chips. - Xiaoyun Zhang; Dezun Dong; Cunlu Li; Shaocong Wang; Liquan Xiao (J. Parallel Distributed Comput., 2024)

BCN: Enhanced Backpressure Flow Control with Rapid Notification in Datacenter Networks. - Xingyu Hu; Dinghuang Hu; Dezun Dong; Cunlu Li; Zejia Zhou; Guoyuan Yuan (Comput. Networks, 2025)