Verification of gate-level arithmetic circuits by function extraction. - Maciej J. Ciesielski; Cunxi Yu; Walter Brown; Duo Liu; André Rossi (DAC, 2015)

Verification of arithmetic datapath designs using word-level approach - A case study. - Cunxi Yu; Walter Brown; Maciej J. Ciesielski (ISCAS, 2015)

Logic Debugging of Arithmetic Circuits. - Samaneh Ghandali; Cunxi Yu; Duo Liu; Walter Brown; Maciej J. Ciesielski (ISVLSI, 2015)

DAG-aware logic synthesis of datapaths. - Cunxi Yu; Maciej J. Ciesielski; Mihir Choudhury; Andrew Sullivan (DAC, 2016)

Oracle-guided incremental SAT solving to reverse engineer camouflaged logic circuits. - Duo Liu; Cunxi Yu; Xiangyu Zhang; Daniel E. Holcomb (DATE, 2016)

Automatic word-level abstraction of datapath. - Cunxi Yu; Maciej J. Ciesielski (ISCAS, 2016)

Analyzing Imprecise Adders Using BDDs - A Case Study. - Cunxi Yu; Maciej J. Ciesielski (ISVLSI, 2016)

Formal Verification Using Don't-Care and Vanishing Polynomials. - Cunxi Yu; Maciej J. Ciesielski (ISVLSI, 2016)

Reverse Engineering of Irreducible Polynomials in GF(2^m) Arithmetic. - Cunxi Yu; Daniel E. Holcomb; Maciej J. Ciesielski (CoRR, 2016)

Formal Verification of Arithmetic Circuits by Function Extraction. - Cunxi Yu; Walter Brown; Duo Liu; André Rossi; Maciej J. Ciesielski (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016)

Efficient parallel verification of Galois field multipliers. - Cunxi Yu; Maciej J. Ciesielski (ASP-DAC, 2017)

Reverse engineering of irreducible polynomials in GF(2m) arithmetic. - Cunxi Yu; Daniel E. Holcomb; Maciej J. Ciesielski (DATE, 2017)

Advanced datapath synthesis using graph isomorphism. - Cunxi Yu; Mihir Choudhury; Andrew Sullivan; Maciej J. Ciesielski (ICCAD, 2017)

Formal Verification of Truncated Multipliers Using Algebraic Approach and Re-Synthesis. - Tiankai Su; Cunxi Yu; Atif Yasin; Maciej J. Ciesielski (ISVLSI, 2017)

Incremental SAT-Based Reverse Engineering of Camouflaged Logic Circuits. - Cunxi Yu; Xiangyu Zhang; Duo Liu; Maciej J. Ciesielski; Daniel E. Holcomb (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017)

Developing synthesis flows without human knowledge. - Cunxi Yu; Houping Xiao; Giovanni De Micheli (DAC, 2018)

Computer Algebraic Approach to Verification and Debugging of Galois Field Multipliers. - Tiankai Su; Atif Yasin; Cunxi Yu; Maciej J. Ciesielski (ISCAS, 2018)

End-to-End Industrial Study of Retiming. - Cunxi Yu; Chau-Chin Huang; Gi-Joon Nam; Mihir Choudhury; Victor N. Kravets; Andrew Sullivan; Maciej J. Ciesielski; Giovanni De Micheli (ISVLSI, 2018)

Generating Safety Guidance for Medical Injection with Three-Compartment Pharmacokinetics Model. - Cunxi Yu; Heinz Riener; Francesca Stradolini; Giovanni De Micheli (ISVLSI, 2018)

Rewriting Environment for Arithmetic Circuit Verification. - Cunxi Yu; Atif Yasin; Tiankai Su; Alan Mishchenko; Maciej J. Ciesielski (LPAR, 2018)

Formal Analysis of Galois Field Arithmetics - Parallel Verification and Reverse Engineering. - Cunxi Yu; Maciej J. Ciesielski (CoRR, 2018)

Algorithmic Obfuscation over GF(2m). - Cunxi Yu; Daniel E. Holcomb (CoRR, 2018)

Performance Estimation of Synthesis Flows cross Technologies using LSTMs and Transfer Learning. - Cunxi Yu; Wang Zhou (CoRR, 2018)

Survey on Applications of Formal Methods in Reverse Engineering and Intellectual Property Protection. - Shahrzad Keshavarz; Cunxi Yu; Samaneh Ghandali; Xiaolin Xu 001; Daniel E. Holcomb (J. Hardw. Syst. Secur., 2018)

Fast Algebraic Rewriting Based on And-Inverter Graphs. - Cunxi Yu; Maciej J. Ciesielski; Alan Mishchenko (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

Spectral approach to verifying non-linear arithmetic circuits. - Cunxi Yu; Tiankai Su; Atif Yasin; Maciej J. Ciesielski (ASP-DAC, 2019)

Painting on Placement: Forecasting Routing Congestion using Conditional Generative Adversarial Nets. - Cunxi Yu; Zhiru Zhang (DAC, 2019)

LAMDA: Learning-Assisted Multi-stage Autotuning for FPGA Design Closure. - Ecenur Ustun; Shaojie Xiang; Jinny Gui; Cunxi Yu; Zhiru Zhang (FCCM, 2019)

Formal Analysis of Galois Field Arithmetic Circuits-Parallel Verification and Reverse Engineering. - Cunxi Yu; Maciej J. Ciesielski (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019)

FlowTune: Practical Multi-armed Bandits in Boolean Optimization. - Cunxi Yu (ICCAD, 2020)

Decision Making in Synthesis cross Technologies using LSTMs and Transfer Learning. - Cunxi Yu; Wang Zhou (MLCAD, 2020)

Contrastive Weight Regularization for Large Minibatch SGD. - Qiwei Yuan; Weizhe Hua; Yi Zhou; Cunxi Yu (CoRR, 2020)

Artificial Intelligence Accelerators based on Graphene Optoelectronic Devices. - Weilu Gao; Cunxi Yu; Ruiyang Chen (CoRR, 2020)

Multi-Task Learning in Diffractive Deep Neural Networks via Hardware-Software Co-design. - Yingjie Li; Ruiyang Chen; Berardi Sensale Rodriguez; Weilu Gao; Cunxi Yu (CoRR, 2020)

Understanding Algebraic Rewriting for Arithmetic Circuit Verification: A Bit-Flow Model. - Maciej J. Ciesielski; Tiankai Su; Atif Yasin; Cunxi Yu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

Read your Circuit: Leveraging Word Embedding to Guide Logic Optimization. - Walter Lau Neto; Matheus Trevisan Moreira; Luca G. Amarù; Cunxi Yu; Pierre-Emmanuel Gaillardon (ASP-DAC, 2021)

Late Breaking Results: Physical Adversarial Attacks of Diffractive Deep Neural Networks. - Yingjie Li; Cunxi Yu (DAC, 2021)

SLAP: A Supervised Learning Approach for Priority Cuts Technology Mapping. - Walter Lau Neto; Matheus T. Moreira; Yingjie Li; Luca G. Amarù; Cunxi Yu; Pierre-Emmanuel Gaillardon (DAC, 2021)

IMpress: Large Integer Multiplication Expression Rewriting for FPGA HLS. - Ecenur Ustun; Ismail San; Jiaqi Yin; Cunxi Yu; Zhiru Zhang (FCCM, 2022)

Physics-Aware Differentiable Discrete Codesign for Diffractive Optical Neural Networks. - Yingjie Li; Ruiyang Chen; Weilu Gao; Cunxi Yu (ICCAD, 2022)

Exact Memory- and Communication-aware Scheduling of DNNs on Pipelined Edge TPUs. - Jiaqi Yin; Zhiru Zhang; Cunxi Yu (SEC, 2022)

End-to-end Automatic Logic Optimization Exploration via Domain-specific Multi-armed Bandit. - Walter Lau Neto; Yingjie Li; Pierre-Emmanuel Gaillardon; Cunxi Yu (CoRR, 2022)

Physics-aware Complex-valued Adversarial Machine Learning in Reconfigurable Diffractive All-optical Neural Network. - Ruiyang Chen; Yingjie Li; Minhan Lou; Jichao Fan; Yingheng Tang; Berardi Sensale Rodriguez; Cunxi Yu; Weilu Gao (CoRR, 2022)

Device-system Co-design of Photonic Neuromorphic Processor using Reinforcement Learning. - Yingheng Tang; Princess Tara Zamani; Ruiyang Chen; Jianzhu Ma; Minghao Qi; Cunxi Yu; Weilu Gao (CoRR, 2022)

Physics-informed recurrent neural network for time dynamics in optical resonances. - Yingheng Tang; Jichao Fan; Xinwei Li; Jianzhu Ma; Minghao Qi; Cunxi Yu; Weilu Gao (Nat. Comput. Sci., 2022)

LightRidge: An End-to-end Agile Design Framework for Diffractive Optical Neural Networks. - Yingjie Li; Ruiyang Chen; Minhan Lou; Berardi Sensale Rodriguez; Weilu Gao; Cunxi Yu (ASPLOS (4), 2023)

Equality Saturation for Datapath Synthesis: A Pathway to Pareto Optimality. - Ecenur Ustun; Cunxi Yu; Zhiru Zhang (DAC, 2023)

Gamora: Graph Learning based Symbolic Reasoning for Large-Scale Boolean Networks. - Nan Wu; Yingjie Li; Cong Hao; Steve Dai; Cunxi Yu; Yuan Xie 001 (DAC, 2023)

RESPECT: Reinforcement Learning based Edge Scheduling on Pipelined Coral Edge TPUs. - Jiaqi Yin; Yingjie Li; Daniel Robinson; Cunxi Yu (DAC, 2023)

Physics-aware Roughness Optimization for Diffractive Optical Neural Networks. - Shanglin Zhou; Yingjie Li; Minhan Lou; Weilu Gao; Zhijie Shi; Cunxi Yu; Caiwen Ding (DAC, 2023)

Invited Paper: Verilog-to-PyG - A Framework for Graph Learning and Augmentation on RTL Designs. - Yingjie Li; Mingju Liu; Alan Mishchenko; Cunxi Yu (ICCAD, 2023)

AIM: Accelerating Arbitrary-Precision Integer Multiplication on Heterogeneous Reconfigurable Computing Platform Versal ACAP. - Zhuoping Yang; Jinming Zhuang; Jiaqi Yin; Cunxi Yu; Alex K. Jones; Peipei Zhou 001 (ICCAD, 2023)

Accelerating Exact Combinatorial Optimization via RL-based Initialization - A Case Study in Scheduling. - Jiaqi Yin; Cunxi Yu (ICCAD, 2023)

Rubik's Optical Neural Networks: Multi-task Learning with Physics-aware Rotation Architecture. - Yingjie Li; Weilu Gao; Cunxi Yu (CoRR, 2023)

DAG-aware Synthesis Orchestration. - Yingjie Li; Mingju Liu; Mark Ren; Alan Mishchenko; Cunxi Yu (CoRR, 2023)

Verilog-to-PyG - A Framework for Graph Learning and Augmentation on RTL Designs. - Yingjie Li; Mingju Liu; Alan Mishchenko; Cunxi Yu (CoRR, 2023)

FlowTune: End-to-End Automatic Logic Optimization Exploration via Domain-Specific Multiarmed Bandit. - Walter Lau Neto; Yingjie Li; Pierre-Emmanuel Gaillardon; Cunxi Yu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

FPGA EDA - Design Principles and Implementation - Kaihui Tu; Xifan Tang; Cunxi Yu; Lana Josipovic; Zhufei Chu (Springer, 2024)

E-Syn: E-Graph Rewriting with Technology-Aware Cost Functions for Logic Synthesis. - Chen Chen; Guangyu Hu; Dongsheng Zuo; Cunxi Yu; Yuzhe Ma; Hongce Zhang (DAC, 2024)

Less is More: Hop-Wise Graph Attention for Scalable and Generalizable Learning on Circuits. - Chenhui Deng; Zichao Yue; Cunxi Yu; Gokce Sarar; Ryan Carey; Rajeev Jain; Zhiru Zhang (DAC, 2024)

BoolGebra: Attributed Graph-Learning for Boolean Algebraic Manipulation. - Yingjie Li; Anthony Agnesina; Yanqing Zhang 002; Haoxing Ren; Cunxi Yu (DATE, 2024)

MapTune: Advancing ASIC Technology Mapping via Reinforcement Learning Guided Library Tuning. - Mingju Liu; Daniel Robinson; Yingjie Li; Cunxi Yu (ICCAD, 2024)

Differentiable Combinatorial Scheduling at Scale. - Mingju Liu; Yingjie Li; Jiaqi Yin; Zhiru Zhang; Cunxi Yu (ICML, 2024)

Linear Algebra Approach to Verification of Modular $(2^{n}-1)$ Multipliers. - Jiteshri Dasari; Cunxi Yu; Maciej J. Ciesielski (VLSI-SoC, 2024)

Dataless Quadratic Neural Networks for the Maximum Independent Set Problem. - Ismail Alkhouri; Cedric Le Denmat; Yingjie Li; Cunxi Yu; Jia Liu; Rongrong Wang; Alvaro Velasquez (CoRR, 2024)

Survey of Machine Learning for Software-assisted Hardware Design Verification: Past, Present, and Prospect. - Nan Wu; Yingjie Li; Hang Yang; Hanqiu Chen; Steve Dai; Cong Hao; Cunxi Yu; Yuan Xie 001 (ACM Trans. Design Autom. Electr. Syst., 2024)

DAG-Aware Synthesis Orchestration. - Yingjie Li; Mingju Liu; Haoxing Ren; Alan Mishchenko; Cunxi Yu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

SmoothE: Differentiable E-Graph Extraction. - Yaohui Cai; Kaixin Yang; Chenhui Deng; Cunxi Yu; Zhiru Zhang (ASPLOS (1), 2025)

SGSS: Streaming 6-DoF Navigation of Gaussian Splat Scenes. - Mufeng Zhu; Mingju Liu; Cunxi Yu; Cheng-Hsin Hsu; Yao Liu 001 (MMSys, 2025)

HEC: Equivalence Verification Checking for Code Transformation via Equality Saturation. - Jiaqi Yin; Zhan Song; Nicolas Bohm Agostini; Antonino Tumeo; Cunxi Yu (USENIX ATC, 2025)

BoolE: Exact Symbolic Reasoning via Boolean Equality Saturation. - Jiaqi Yin; Zhan Song; Chen Chen; Qihao Hu; Cunxi Yu (CoRR, 2025)

E-morphic: Scalable Equality Saturation for Structural Exploration in Logic Synthesis. - Chen Chen; Guangyu Hu; Cunxi Yu; Yuzhe Ma; Hongce Zhang (CoRR, 2025)

Mapping Fusion: Improving FPGA Technology Mapping with ASIC Mapper. - Cunxi Yu (CoRR, 2025)

e-boost: Boosted E-Graph Extraction with Adaptive Heuristics and Exact Solving. - Jiaqi Yin; Zhan Song; Chen Chen; Yaohui Cai; Zhiru Zhang; Cunxi Yu (CoRR, 2025)

Revisit Choice Network for Synthesis and Technology Mapping. - Chen Chen; Jiaqi Yin; Cunxi Yu (CoRR, 2025)