On voting machine design for verification and testability. - Cynthia Sturton; Susmit Jha; Sanjit A. Seshia; David A. Wagner 001 (CCS, 2009)

Weight, Weight, Don't Tell Me: Using Scales to Select Ballots for Auditing. - Cynthia Sturton; David A. Wagner 001 (EVT/WOTE, 2009)

Defeating UCI: Building Stealthy and Malicious Hardware. - Cynthia Sturton; Matthew Hicks; David A. Wagner 001; Samuel T. King (IEEE Symposium on Security and Privacy, 2011)

Verification with small and short worlds. - Rohit Sinha 001; Cynthia Sturton; Petros Maniatis; Sanjit A. Seshia; David A. Wagner 001 (FMCAD, 2012)

Automated Analysis of Election Audit Logs. - Patrick Baxter; Anne Edmundson; Keishla Ortiz; Ana Maria Quevedo; Samuel Rodríguez; Cynthia Sturton; David A. Wagner 001 (EVT/WOTE, 2012)

Symbolic software model validation. - Cynthia Sturton; Rohit Sinha 001; Thurston H. Y. Dang; Sakshi Jain; Michael McCoyd; Wei Yang Tan; Petros Maniatis; Sanjit A. Seshia; David A. Wagner 001 (MEMOCODE, 2013)

Secure Virtualization with Formal Methods. - Cynthia Sturton (2013)

SPECS: A Lightweight Runtime Mechanism for Protecting Software from Security-Critical Processor Bugs. - Matthew Hicks; Cynthia Sturton; Samuel T. King; Jonathan M. Smith (ASPLOS, 2015)

Usability of Augmented Reality for Revealing Secret Messages to Users but Not Their Devices. - Sarah J. Andrabi; Michael K. Reiter; Cynthia Sturton (SOUPS, 2015)

Model checking to find vulnerabilities in an instruction set architecture. - Chris Bradfield; Cynthia Sturton (HOST, 2016)

Server-side verification of client behavior in cryptographic protocols. - Andrew Chi; Robert A. Cochran; Marie Nesfield; Michael K. Reiter; Cynthia Sturton (CoRR, 2016)

Identifying Security Critical Properties for the Dynamic Verification of a Processor. - Rui Zhang 068; Natalie Stanley; Christopher Griggs; Andrew Chi; Cynthia Sturton (ASPLOS, 2017)

A System to Verify Network Behavior of Known Cryptographic Clients. - Andrew Chi; Robert A. Cochran; Marie Nesfield; Michael K. Reiter; Cynthia Sturton (NSDI, 2017)

On Using Drivers' Eyes to Predict Accident-Causing Drowsiness Levels. - Alyssa Byrnes; Cynthia Sturton (ITSC, 2018)

End-to-End Automated Exploit Generation for Validating the Security of Processor Designs. - Rui Zhang 068; Calvin Deutschbein; Peng Huang 005; Cynthia Sturton (MICRO, 2018)

Mining Security Critical Linear Temporal Logic Specifications for Processors. - Calvin Deutschbein; Cynthia Sturton (MTV, 2018)

FinalFilter: Asserting Security Properties of a Processor at Runtime. - Cynthia Sturton; Matthew Hicks; Samuel T. King; Jonathan M. Smith (IEEE Micro, 2019)

Evaluating Security Specification Mining for a CISC Architecture. - Calvin Deutschbein; Cynthia Sturton (HOST, 2020)

Evaluating a Specification for its Support of Mode Awareness using Discrete and Continuous Model Checking. - Alyssa Byrnes; Cynthia Sturton (ITSC, 2020)

Transys: Leveraging Common Security Properties Across Hardware Designs. - Rui Zhang 068; Cynthia Sturton (SP, 2020)

Isadora: Automated Information Flow Property Generation for Hardware Designs. - Calvin Deutschbein; Andres Meza 001; Francesco Restuccia 002; Ryan Kastner; Cynthia Sturton (ASHES@CCS, 2021)

A Methodology For Creating Information Flow Specifications of Hardware Designs. - Calvin Deutschbein; Andres Meza 001; Francesco Restuccia 002; Ryan Kastner; Cynthia Sturton (CoRR, 2021)

End-to-End Automated Exploit Generation for Processor Security Validation. - Rui Zhang 068; Calvin Deutschbein; Peng Huang 005; Cynthia Sturton (IEEE Des. Test, 2021)

Automating hardware security property generation: invited. - Ryan Kastner; Francesco Restuccia 002; Andres Meza 001; Sayak Ray; Jason M. Fung; Cynthia Sturton (DAC, 2022)

Toward Hardware Security Property Generation at Scale. - Calvin Deutschbein; Andres Meza 001; Francesco Restuccia 002; Matthew Gregoire; Ryan Kastner; Cynthia Sturton (IEEE Secur. Priv., 2022)

Sylvia: Countering the Path Explosion Problem in the Symbolic Execution of Hardware Designs. - Kaki Ryan; Cynthia Sturton (FMCAD, 2023)

SEIF: Augmented Symbolic Execution for Information Flow in Hardware Designs. - Kaki Ryan; Matthew Gregoire; Cynthia Sturton (HASP@MICRO, 2023)

Special Session: CAD for Hardware Security - Promising Directions for Automation of Security Assurance. - Sohrab Aftabjahani; Mark Tehranipoor; Farimah Farahmandi; Bulbul Ahmed; Ryan Kastner; Francesco Restuccia 002; Andres Meza 001; Kaki Ryan; Nicole Fern; Jasper Van Woudenberg; Rajesh Velegalati; Cees-Bart Breunesse; et al. (VTS, 2023)

Countering the Path Explosion Problem in the Symbolic Execution of Hardware Designs. - Kaki Ryan; Cynthia Sturton (CoRR, 2023)

Augmented Symbolic Execution for Information Flow in Hardware Designs. - Kaki Ryan; Matthew Gregoire; Cynthia Sturton (CoRR, 2023)

Impact of Emerging Hardware on Security and Privacy. - Trent Jaeger; Brent ByungHoon Kang; Nele Mentens; Cynthia Sturton (IEEE Secur. Priv., 2023)

Isadora: automated information-flow property generation for hardware security verification. - Calvin Deutschbein; Andres Meza 001; Francesco Restuccia 002; Ryan Kastner; Cynthia Sturton (J. Cryptogr. Eng., 2023)

Security Properties for Open-Source Hardware Designs. - Jayden Rogers; Niyaz Shakeel; Divya Mankani; Samantha Espinosa; Cade Chabra; Kaki Ryan; Cynthia Sturton (CoRR, 2024)

Special Session: Bringing Symbolic Execution to the Security Verification of Hardware Designs. - Kaki Ryan; Cynthia Sturton (VTS, 2025)

HeatSense: Intelligent Thermal Anomaly Detection for Securing NoC-Enabled MPSoCs. - Mahdi Hasanzadeh; Kasem Khalil; Cynthia Sturton; Ahmad Patooghy (CoRR, 2025)