LFSROM an algorithm for automatic design synthesis of hardware test pattern generator. - Christian Dufaza; Cyril Chevalier; Lew Fock Chong Lew Yan Voon (VTS, 1993)

BIST hardware generator for mixed test scheme. - Christian Dufaza; H. Viallon; Cyril Chevalier (ED&TC, 1995)

Distributed asynchronous controllers for clock management in low power systems. - Chadi Al Khatib; Claire Aupetit; Alejandro Chagoya; Cyril Chevalier; Gilles Sicard; Laurent Fesquet (ICECS, 2014)

An efficient hybrid power modeling approach for accurate gate-level power estimation. - Alejandro Nocua; Arnaud Virazel; Alberto Bosio; Patrick Girard 001; Cyril Chevalier (ICM, 2015)

A generic clock controller for low power systems: Experimentation on an AXI bus. - Chadi Al Khatib; Claire Aupetit; Cyril Chevalier; Chouki Aktouf; Gilles Sicard; Laurent Fesquet (VLSI-SoC, 2015)

A hybrid power modeling approach to enhance high-level power models. - Alejandro Nocua; Arnaud Virazel; Alberto Bosio; Patrick Girard 001; Cyril Chevalier (DDECS, 2016)

A Hybrid Power Estimation Technique to improve IP power models quality. - Alejandro Nocua; Arnaud Virazel; Alberto Bosio; Patrick Girard 001; Cyril Chevalier (VLSI-SoC, 2016)

HPET: An Efficient Hybrid Power Estimation Technique to Improve High-Level Power Characterization. - Alejandro Nocua; Arnaud Virazel; Alberto Bosio; Patrick Girard 001; Cyril Chevalier (J. Circuits Syst. Comput., 2017)

A Cross-Level Power Estimation Technique to Enhance High-Level Power Models Quality. - Alejandro Nocua; Arnaud Virazel; Alberto Bosio; Patrick Girard 001; Cyril Chevalier (J. Low Power Electron., 2017)