Fine-grained power managed dual-thread vector scalar unit for the first-generation CELL processor. - Tom Beacom; Timothy C. Buchholtz; D. Bradley; Jack Randolph; Salvatore N. Storino; Mark Veldhuizen; Sherman M. Dance; Jente B. Kuang; Steve Schwinn; Sue Cox; Fred Ziegler; J. Kao; et al. (CICC, 2005)

Design, modelling, simulation and integration of cyber physical systems: Methods and applications. - Peter Hehenberger; Birgit Vogel-Heuser; D. Bradley; Benoît Eynard; Tetsuo Tomiyama; Sofiane Achiche (Comput. Ind., 2016)

E-Core Implementation in Intel 4 with PowerVia (Backside Power) Technology. - M. Shamanna; E. Abuayob; G. Aenuganti; C. Alvares; J. Antony; A. Bahudhanam; A. Chandran; P. Chew; A. Chatterjee; B. Chauhan; N. Dandeti; J. Desai; et al. (VLSI Technology and Circuits, 2023)