A survey on B*-Tree-based evolutionary algorithms for VLSI floorplanning optimisation. - D. Gracia Nirmala Rani; S. Rajaram 001 (Int. J. Comput. Appl. Technol., 2013)

Design of CMOS based LNA for 5G Wireless Applications. - A. Andrew Roobert; D. Gracia Nirmala Rani; M. Divya; S. Rajaram 001 (ICCBN, 2018)

Design of CMOS Based Biosensor for Implantable Medical Devices. - G. Gifta; D. Gracia Nirmala Rani; Nifasath Farhana; R. Archana (VDAT, 2018)

Design and optimisation of feedforward noise cancelling complementary metal oxide semiconductor LNA for 2.4 GHz WLAN applications. - A. Andrew Roobert; D. Gracia Nirmala Rani; S. Rajaram 001 (IET Circuits Devices Syst., 2019)

Design and analysis of 0.9 and 2.3-GHz concurrent dual-band CMOS LNA for mobile communication. - A. Andrew Roobert; D. Gracia Nirmala Rani (Int. J. Circuit Theory Appl., 2020)

Design and analysis of a sleep and wake-up CMOS low noise amplifier for 5G applications. - A. Andrew Roobert; D. Gracia Nirmala Rani (Telecommun. Syst., 2021)

Design of 5-bit Flash ADC Using 180 nm Technology for Medical Applications. - G. Gifta; D. Gracia Nirmala Rani (Wirel. Pers. Commun., 2021)

Design and analysis of 28 GHz CMOS low power LNA with 6.4 dB gain variability for 5G applications. - A. Andrew Roobert; P. Sherly Arunodhayamary; D. Gracia Nirmala Rani; M. Venkatesh; L. Jerart Julus (Trans. Emerg. Telecommun. Technol., 2022)

An Enhanced Memetic Algorithm using SKB tree representation for fixed-outline and temperature driven non-slicing floorplanning. - J. Shanthi; D. Gracia Nirmala Rani; S. Rajaram 001 (Integr., 2022)

A C4.5 decision tree classifier based floorplanning algorithm for System-on-Chip design. - J. Shanthi; D. Gracia Nirmala Rani; S. Rajaram 001 (Microelectron. J., 2022)

Enhancing Digital Microfluidic Biochip Operations with Scheduling Interval Method. - Nirmala N; D. Gracia Nirmala Rani (VLSID, 2025)