Parallel Implementation of 2D-Discrete Cosine Transform Using EPLDs. - D. V. R. Murthy; Seetharaman Ramachandran; S. Srinivasan 001 (VLSI Design, 1999)

A Comprehensive SoC Design Methodology for Nanometer Design Challenges. - R. Raghavendra Kumar; Ricky Bedi; Ramadas Rajagopal; N. Guruprasad; K. Subbarangaiah; Taher Abbasi; D. V. R. Murthy; P. Krishna Prasad; D. R. Gude (VLSI Design, 2006)