Development of Enhanced Data Mining System to Approximate Empirical Formula for Ship Design. - Kyung Ho Lee; Kyung Su Kim; Jang Hyun Lee; Jong Hoon Park; Dong Geun Kim; Dae Suk Kim (KSEM, 2007)

25.2 A 1.2V 8Gb 8-channel 128GB/s high-bandwidth memory (HBM) stacked DRAM with effective microbump I/O test methods using 29nm process and TSV. - Dong-Uk Lee; Kyung Whan Kim; Kwan-Weon Kim; Hongjung Kim; Ju Young Kim; Young Jun Park 006; Jae Hwan Kim; Dae Suk Kim; Heat Bit Park; Jin Wook Shin; Jang Hwan Cho; Ki Hun Kwon; et al. (ISSCC, 2014)

High bandwidth memory(HBM) with TSV technique. - Jong-Chern Lee; Jihwan Kim; Kyung Whan Kim; Young Jun Ku; Dae Suk Kim; Chunseok Jeong; Tae Sik Yun; Hongjung Kim; Ho Sung Cho; Sangmuk Oh; Hyun Sung Lee; Ki Hun Kwon; et al. (ISOCC, 2016)

18.3 A 1.2V 64Gb 8-channel 256GB/s HBM DRAM with peripheral-base-die architecture and small-swing technique on heavy load interface. - Jong-Chern Lee; Jihwan Kim; Kyung Whan Kim; Young Jun Ku; Dae Suk Kim; Chunseok Jeong; Tae Sik Yun; Hongjung Kim; Ho Sung Cho; Yeon Ok Kim; Jae-Hwan Kim; Jin Ho Kim; et al. (ISSCC, 2016)

A 1.1V 1ynm 6.4Gb/s/pin 16Gb DDR5 SDRAM with a Phase-Rotator-Based DLL, High-Speed SerDes and RX/TX Equalization Scheme. - Dongkyun Kim; Minsu Park; Sungchun Jang; Jun-Yong Song; Hankyu Chi; Geunho Choi; Sunmyung Choi; Jaeil Kim; Changhyun Kim; Kyung Whan Kim; Kibong Koo; Seonghwi Song; et al. (ISSCC, 2019)