0.5 and 1.5 THz monolithic imagers in a 65 nm CMOS adopting a VCO-based signal processing. - Sun-a Kim; Kyoung-Yong Choi; Dae-Woong Park; Joo-Myoung Kim; Seok-Kyun Han; Sang-Gug Lee 001 (A-SSCC, 2017)

A 230-260GHz wideband amplifier in 65nm CMOS based on dual-peak Gmax-core. - Dae-Woong Park; Dzuhri Radityo Utomo; Jong-Phil Hong; Sang-Gug Lee 001 (ASP-DAC, 2018)

A 230-260-GHz Wideband and High-Gain Amplifier in 65-nm CMOS Based on Dual-Peak $G_{{ mathrm{max}}}$ -Core. - Dae-Woong Park; Dzuhri Radityo Utomo; Bao Huu Lam; Sang-Gug Lee 001; Jong-Phil Hong (IEEE J. Solid State Circuits, 2019)

A 247 and 272 GHz Two-Stage Regenerative Amplifiers in 65 nm CMOS with 18 and 15 dB Gain Based on Double-Gmax Gain Boosting Technique. - Dae-Woong Park; Dzuhri Radityo Utomo; Jong-Phil Hong; Kristof Vaesen; Piet Wambacq; Sang-Gug Lee 001 (VLSI Circuits, 2020)

A 293/440 GHz Push-Push Double Feedback Oscillators with 5.0/-3.9 dBm Output Power and 2.9/0.6 % DC-to-RF Efficiency in 65 nm CMOS. - Dzuhri Radityo Utomo; Dae-Woong Park; Byeonghun Yun; Sang-Gug Lee 001 (VLSI Circuits, 2020)

245/243GHz, 9.2/10.5dBm Saturated Output Power, 4.6/2.8% PAE, and 28/26dB Gain Power Amplifiers in 65nm CMOS Adopting 2-and 4-way Power Combining. - Byeonghun Yun; Dae-Woong Park; Kyung-Sik Choi; Ho-Jin Song; Sang-Gug Lee 001 (A-SSCC, 2021)

A 67mW D-band FMCW I/Q Radar Receiver with an N-path Spillover Notch Filter in 28nm CMOS. - Anirudh Kankuppe; Sehoon Park; Kristof Vaesen; Dae-Woong Park; Barend van Liempd; Piet Wambacq; Jan Craninckx (ESSCIRC, 2021)

A D-Band Power Amplifier in 65-nm CMOS by Adopting Simultaneous Output Power-and Gain-Matched Gmax-Core. - Dae-Woong Park; Dzuhri Radityo Utomo; Byeonghun Yun; Hafiz Usman Mahmood; Sang-Gug Lee 001 (IEEE Access, 2021)

Design of High-Gain Sub-THz Regenerative Amplifiers Based on Double-Gmax Gain Boosting Technique. - Dae-Woong Park; Dzuhri Radityo Utomo; Byeonghun Yun; Hafiz Usman Mahmood; Jong-Phil Hong; Sang-Gug Lee 001 (IEEE J. Solid State Circuits, 2021)

A 67-mW D-Band FMCW I/Q Radar Receiver With an N-Path Spillover Notch Filter in 28-nm CMOS. - Anirudh Kankuppe; Sehoon Park; Kristof Vaesen; Dae-Woong Park; Barend van Liempd; Siddhartha Sinha; Piet Wambacq; Jan Craninckx (IEEE J. Solid State Circuits, 2022)

A D-Band Low-Power and High-Efficiency Frequency Multiply-by-9 FMCW Radar Transmitter in 28-nm CMOS. - Sehoon Park; Dae-Woong Park; Kristof Vaesen; Anirudh Kankuppe; Siddhartha Sinha; Barend van Liempd; Piet Wambacq; Jan Craninckx (IEEE J. Solid State Circuits, 2022)

A 16GHz, $41 text{kHz}_{ text{rms}}$ Frequency Error, Background-Calibrated, Duty-Cycled FMCW Charge-Pump PLL. - Pratap Tumkur Renukaswamy; Kristof Vaesen; Nereo Markulic; Veerle Derudder; Dae-Woong Park; Piet Wambacq; Jan Craninckx (ISSCC, 2023)

H-Band Power Amplifiers in 65-nm CMOS by Adopting Output Power Maximized Gmax-Core and Transmission Line-Based Zero-Degree Power Combining Networks. - Byeonghun Yun; Dae-Woong Park; Sang-Gug Lee 001 (IEEE J. Solid State Circuits, 2023)

A D-Band Differential Amplifier With Cross-Couple of Series-Connected Capacitor and Transmission Line-Based Dual-Frequency Gmax-Core. - Hyo-Ryeong Jeon; Dae-Woong Park; Sang-Gug Lee 001 (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

High-Power 150/245-GHz Fundamental Oscillators With 12.1/-2.54-dBm Peak Output Power for Phased Array Transceivers. - Abdul Qahir; Dzuhri Radityo Utomo; Byeonghun Yun; Kyung-Sik Choi; Dae-Woong Park; Sang-Gug Lee 001 (IEEE J. Solid State Circuits, 2024)