A Low-Power Switching Method with a Bootstrapping Circuit for High-Speed Transmitters. - Daeho Yun; Bongsub Song; Kyunghoon Kim; Junan Lee; Jinwook Burm (IEICE Trans. Electron., 2012)

Auto-tracking Method with Optimal Reference Voltage for PAM-4 Receiver. - Daeho Yun; Deog-Kyoon Jeong (ISOCC, 2021)

A 32-Gb/s PAM4-Binary Bridge With Sampler Offset Cancellation for Memory Testing. - Daeho Yun; Eonhui Lee; Woosong Jung; Kahyun Kim; Kyung-Min Beak; Jihee Kim; Hyun Bae Lee; Byeongseon Ko; Woo-Seok Choi; Deog-Kyoon Jeong (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

A PAM4 Level Mismatch Adjustment Scheme for 48-Gb/s PAM4 Memory Tester Bridge. - Daeho Yun; Minsu Park; Kahyun Kim; Kyungmin Baek; Eonhui Lee; Woo-Seok Choi; Deog-Kyoon Jeong (A-SSCC, 2023)

A 48-Gb/s Single-Ended PAM-4 Receiver with Adaptive Nonlinearity Compensation. - Kahyun Kim; Daeho Yun; Kyungmin Baek; Woo-Seok Choi; Deog-Kyoon Jeong (ISCAS, 2023)