23.6 A 0.6V 4.266Gb/s/pin LPDDR4X interface with auto-DQS cleaning and write-VWM training for memory controller. - Soo-Min Lee; Jihun Oh; Jinho Choi; Seokkyun Ko; Daero Kim; Kyounghoi Koo; JongRyun Choi; Yoonjee Nam; Sangsoo Park; Hyungkweon Lee; Eunsu Kim; Sukhyun Jung; et al. (ISSCC, 2017)

Adaptive Granularity On-die ECC. - Daero Kim; Jungrae Kim (ISOCC, 2022)

Carbon-Aware and Fault-Tolerant Migration of Deep Learning Workloads in the Geo-Distributed Cloud. - Jeonghyeon Park; Daero Kim; Jiseon Kim; Jungkyu Han; Sejin Chun (CLOUD, 2024)

A 4-nm 9.6-Gb/s/pin LPDDR5X PHY With Adaptive Driver Strength Control and Fast Periodic Training for Full DVFS DRAM. - Yoonjae Choi; Jaegeun Song; Daero Kim; Myunggon Kim; Jiyeon Park; Jinho Choi; Changki Kwon; Minho Seo; Jihun Oh; Shinyoung Yi 002; Billy Koo; Kwanyeob Chae; et al. (A-SSCC, 2024)

Agile-DRAM: Agile Trade-Offs in Memory Capacity, Latency, and Energy for Data Centers. - Jaeyoon Lee; Wonyeong Jung; Dongwhee Kim; Daero Kim; Junseung Lee; Jungrae Kim (HPCA, 2024)