A phase noise minimization of CMOS VCOs over wide tuning range and large PVT variations. - Daisuke Miyashita; Hiroki Ishikuro; Shouhei Kousai; Hiroyuki Kobayashi; Hideaki Majima; Kenichi Agawa; Mototsugu Hamada (CICC, 2005)

Monolithically Integrated Mach-Zehnder Interferometer All-Optical Switches by Selective Area MOVPE. - Xueliang Song; Naoki Futakuchi; Daisuke Miyashita; Foo Cheong Yit; Yoshiaki Nakano (IEICE Trans. Electron., 2006)

A 1.2V 0.2-to-6.3GHz Transceiver with Less Than -29.5dB EVM@-3dBm and a Choke/Coil-Less Pre-Power Amplifier. - Shouhei Kousai; Daisuke Miyashita; Junji Wadatsumi; Asuka Maki; Takahiro Sekiguchi; Rui Ito; Mototsugu Hamada (ISSCC, 2008)

A 0.6V 380µW -14dBm LO-input 2.4GHz double-balanced current-reusing single-gate CMOS mixer with cyclic passive combiner. - Jun Deguchi; Daisuke Miyashita; Mototsugu Hamada (ISSCC, 2009)

A fully integrated 2×1 dual-band direct-conversion transceiver with dual-mode fractional divider and noise-shaping TIA for mobile WiMAX SoC in 65nm CMOS. - Jun Deguchi; Daisuke Miyashita; Yosuke Ogasawara; Gaku Takemura; Masaomi Iwanaga; Kenichi Sami; Rui Ito; Junji Wadatsumi; Yuki Tsuda; Shoko Oda; Shunji Kawaguchi; Nobuyuki Itoh; et al. (ISSCC, 2010)

A Fully Integrated 2 ˟ 1 Dual-Band Direct-Conversion Mobile WiMAX Transceiver With Dual-Mode Fractional Divider and Noise-Shaping Transimpedance Amplifier in 65 nm CMOS. - Jun Deguchi; Daisuke Miyashita; Yosuke Ogasawara; Gaku Takemura; Masaomi Iwanaga; Kenichi Sami; Rui Ito; Junji Wadatsumi; Yuki Tsuda; Shoko Oda; Shunji Kawaguchi; Nobuyuki Itoh; et al. (IEEE J. Solid State Circuits, 2010)

A Low-Noise and Highly-Linear Transmitter with Envelope Injection Pre-Power Amplifier for Multi-Mode Radio. - Shouhei Kousai; Daisuke Miyashita; Junji Wadatsumi; Rui Ito; Takahiro Sekiguchi; Mototsugu Hamada; Kenichi Okada 001 (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2011)

A -70dBm-sensitivity 522Mbps 0.19nJ/bit-TX 0.43nJ/bit-RX transceiver for TransferJet™ SoC in 65nm CMOS. - Daisuke Miyashita; Kenichi Agawa; Hirotsugu Kajihara; Kenichi Sami; Masaomi Iwanaga; Yosuke Ogasawara; Tomohiko Ito; Daisuke Kurose; Naotaka Koide; Toru Hashimoto; Hiroki Sakurai; Takafumi Yamaji; et al. (VLSIC, 2012)

A-104 dBc/Hz In-Band Phase Noise 3 GHz All Digital PLL with Phase Interpolation Based Hierarchical Time to Digital Converter. - Daisuke Miyashita; Hiroyuki Kobayashi; Jun Deguchi; Shouhei Kousai; Mototsugu Hamada; Ryuichi Fujimoto (IEICE Trans. Electron., 2012)

A supply-noise-rejection technique in ADPLL with noise-cancelling current source. - Yusuke Niki; Daisuke Miyashita; Hiroyuki Kobayashi; Shouhei Kousai (ESSCIRC, 2013)

A 10.4pJ/b (32, 8) LDPC decoder with time-domain analog and digital mixed-signal processing. - Daisuke Miyashita; Ryo Yamaki; Kazunori Hashiyoshi; Hiroyuki Kobayashi; Shouhei Kousai; Yukihito Oowaki; Yasuo Unekawa (ISSCC, 2013)

A -70 dBm-Sensitivity 522 Mbps 0.19 nJ/bit-TX 0.43 nJ/bit-RX Transceiver for TransferJetTM SoC in 65 nm CMOS. - Daisuke Miyashita; Kenichi Agawa; Hirotsugu Kajihara; Kenichi Sami; Ichiro Seto; Ryuichi Fujimoto; Yasuo Unekawa (IEICE Trans. Electron., 2013)

19.3 66.3KIOPS-random-read 690MB/s-sequential-read universal Flash storage device controller with unified memory extension. - Konosuke Watanabe; Kenichiro Yoshii; Nobuhiro Kondo; Ken-ichi Maeda; Toshio Fujisawa; Junji Wadatsumi; Daisuke Miyashita; Shouhei Kousai; Yasuo Unekawa; Shinsuke Fujii; Takuma Aoyama; Takayuki Tamura; et al. (ISSCC, 2014)

3D-integrated, low-height, small module design techniques for 4.48GHz, 560MHz-bandwidth TransferJet™ transceiver. - Kenichi Agawa; Ichiro Seto; Akihiko Happoya; Yoshihiro Iida; Yusuke Imaizumi; Motochika Okano; Daigo Suzuki; Yuichi Sato; Masaomi Iwanaga; Kazumi Sato; Satoshi Arai; Noriaki Uchida; et al. (RWS, 2014)

An LDPC Decoder With Time-Domain Analog and Digital Mixed-Signal Processing. - Daisuke Miyashita; Ryo Yamaki; Kazunori Hashiyoshi; Hiroyuki Kobayashi; Shouhei Kousai; Yukihito Oowaki; Yasuo Unekawa (IEEE J. Solid State Circuits, 2014)

Mixed-signal circuits for embedded machine-learning applications. - Boris Murmann; Daniel Bankman; Elaina Chai; Daisuke Miyashita; Lita Yang (ACSSC, 2015)

Time-domain neural network: A 48.5 TSOp/s/W neuromorphic chip optimized for deep learning and CMOS technology. - Daisuke Miyashita; Shouhei Kousai; Tomoya Suzuki; Jun Deguchi (A-SSCC, 2016)

Convolutional Neural Networks using Logarithmic Data Representation. - Daisuke Miyashita; Edward H. Lee; Boris Murmann (CoRR, 2016)

LogNet: Energy-efficient neural networks using logarithmic computation. - Edward H. Lee; Daisuke Miyashita; Elaina Chai; Boris Murmann; S. Simon Wong (ICASSP, 2017)

A Neuromorphic Chip Optimized for Deep Learning and CMOS Technology With Time-Domain Analog and Digital Mixed-Signal Processing. - Daisuke Miyashita; Shouhei Kousai; Tomoya Suzuki; Jun Deguchi (IEEE J. Solid State Circuits, 2017)

FPGA-based CNN Processor with Filter-Wise-Optimized Bit Precision. - Asuka Maki; Daisuke Miyashita; Kengo Nakata; Fumihiko Tachibana; Tomoya Suzuki; Jun Deguchi (A-SSCC, 2018)

A 12.8 GB/S Daisy Chain-Based Downlink I/F Employing Spectrally Compressed Multi-Band Multiplexing for High-Bandwidth and Large-Capacity Storage Systems. - Yuta Tsubouchi; Daisuke Miyashita; Yuji Satoh; Takashi Toi; Fumihiko Tachibana; Makoto Morimoto; Junji Wadatsumi; Jun Deguchi (VLSI Circuits, 2018)

Post Training Weight Compression with Distribution-based Filter-wise Quantization Step. - Shinichi Sasaki; Asuka Maki; Daisuke Miyashita; Jun Deguchi (COOL CHIPS, 2019)

Live Demonstration: FPGA-Based CNN Accelerator with Filter-Wise-Optimized Bit Precision. - Kengo Nakata; Asuka Maki; Daisuke Miyashita; Fumihiko Tachibana; Tomoya Suzuki; Jun Deguchi (ISCAS, 2019)

A 12.8-Gb/s Daisy Chain-Based Downlink I/F Employing Spectrally Compressed Multi-Band Multiplexing for High-Bandwidth, Large-Capacity Storage Systems. - Yuta Tsubouchi; Daisuke Miyashita; Takashi Toi; Yuji Satoh; Fumihiko Tachibana; Junji Wadatsumi; Makoto Morimoto; Ryuichi Fujimoto; Jun Deguchi (IEEE J. Solid State Circuits, 2019)

Weight Compression MAC Accelerator for Effective Inference of Deep Learning. - Asuka Maki; Daisuke Miyashita; Shinichi Sasaki; Kengo Nakata; Fumihiko Tachibana; Tomoya Suzuki; Jun Deguchi; Ryuichi Fujimoto (IEICE Trans. Electron., 2020)

Quantization Strategy for Pareto-optimally Low-cost and Accurate CNN. - Kengo Nakata; Daisuke Miyashita; Asuka Maki; Fumihiko Tachibana; Shinichi Sasaki; Jun Deguchi; Ryuichi Fujimoto (AICAS, 2021)

Adaptive Quantization Method for CNN with Computational-Complexity-Aware Regularization. - Kengo Nakata; Daisuke Miyashita; Jun Deguchi; Ryuichi Fujimoto (ISCAS, 2021)

Revisiting a kNN-Based Image Classification System with High-Capacity Storage. - Kengo Nakata; Youyang Ng; Daisuke Miyashita; Asuka Maki; Yu-Chieh Lin 002; Jun Deguchi (ECCV (37), 2022)

RaLLe: A Framework for Developing and Evaluating Retrieval-Augmented Large Language Models. - Yasuto Hoshi; Daisuke Miyashita; Youyang Ng; Kento Tatsuno; Yasuhiro Morioka; Osamu Torii; Jun Deguchi (EMNLP (Demos), 2023)

Can a Frozen Pretrained Language Model be used for Zero-shot Neural Retrieval on Entity-centric Questions? - Yasuto Hoshi; Daisuke Miyashita; Yasuhiro Morioka; Youyang Ng; Osamu Torii; Jun Deguchi (CoRR, 2023)

SimplyRetrieve: A Private and Lightweight Retrieval-Centric Generative AI Tool. - Youyang Ng; Daisuke Miyashita; Yasuto Hoshi; Yasuhiro Morioka; Osamu Torii; Tomoya Kodama; Jun Deguchi (CoRR, 2023)

Rethinking Sparse Lexical Representations for Image Retrieval in the Age of Rising Multi-modal Large Language Models. - Kengo Nakata; Daisuke Miyashita; Youyang Ng; Yasuto Hoshi; Jun Deguchi (ECCV Workshops (17), 2024)

Mitigation of Accuracy Degradation in 3D Flash Memory Based Approximate Nearest Neighbor Search with Binary Tree Balanced Soft Clustering for Retrieval-Augmented AI. - Shinichi Sasaki; Yuta Aiba; Yusuke Komano; Takahiko Iizuka; Motohiko Fujimatsu; Atsushi Kawasumi; Daisuke Miyashita; Jun Deguchi; Takashi Maeda; Shinji Miyano; Tooru Maruyama (NewCAS, 2024)

AiSAQ: All-in-Storage ANNS with Product Quantization for DRAM-free Information Retrieval. - Kento Tatsuno; Daisuke Miyashita; Taiga Ikeda; Kiyoshi Ishiyama; Kazunari Sumiyoshi; Jun Deguchi (CoRR, 2024)

Accelerating CNN Inference with an Adaptive Quantization Method Using Computational Complexity-Aware Regularization. - Kengo Nakata; Daisuke Miyashita; Jun Deguchi; Ryuichi Fujimoto (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2025)

On Storage Neural Network Augmented Approximate Nearest Neighbor Search. - Taiga Ikeda; Daisuke Miyashita; Jun Deguchi (CoRR, 2025)