Recursive maximum likelihood decoder for high-speed satellite communication. - Morgan Hirosuke Miki; Daisuke Taki; Gen Fujita; Takao Onoye; Isao Shirakawa; Toru Fujiwara; Tadao Kasami (ISCAS (4), 1999)

VLSI implementation of a realtime wavelet video coder. - Roberto Yusi Omaki; Yu Dong; M. Horgan Miki; Makoto Furuie; Shohei Yamada; Daisuke Taki; Masaya Tarui; Gen Fujita; Takao Onoye; Isao Shirakawa (CICC, 2000)

Realtime wavelet video coder based on reduced memory accessing. - Roberto Yusi Omaki; Yu Dong; Morgan Hirosuke Miki; Makoto Furuie; Daisuke Taki; Masaya Tarui; Gen Fujita; Takao Onoye; Isao Shirakawa (ASP-DAC, 2001)

A 7uW deep-sleep, ultra low-power WLAN baseband LSI for mobile applications. - Daisuke Taki; Tatsuo Shiozawa; Kuniaki Ito; Youichiro Shiba; Kouji Horisaki; Hirotsugu Kajihara; Toshiyuki Yamagishi; Masahiro Sekiya; Akira Yamaga; Tetsuya Fujita; Hiroyuki Hara; Masanori Kuwahara; et al. (COOL Chips, 2011)

An 802.11ax 4×4 spectrum-efficient WLAN AP transceiver SoC supporting 1024QAM with frequency-dependent IQ calibration and integrated interference analyzer. - Shusuke Kawai; Hiromitsu Aoyama; Rui Ito; Yutaka Shimizu; Mitsuyuki Ashida; Asuka Maki; Tomohiko Takeuchi; Hiroyuki Kobayashi; Go Urakawa; Hiroaki Hoshino; Shigehito Saigusa; Kazushi Koyama; et al. (ISSCC, 2018)

GPU Graph Processing on CXL-Based Microsecond-Latency External Memory. - Shintaro Sano; Yosuke Bando; Kazuhiro Hiwada; Hirotsugu Kajihara; Tomoya Suzuki; Yu Nakanishi; Daisuke Taki; Akiyuki Kaneko; Tatsuo Shiozawa (SC Workshops, 2023)