Soft-Error Susceptibility in Flip-Flop in EUV 7 nm Bulk-FinFET Technology. - Taiki Uemura; Byungjin Chung; Jeongmin Jo; Mijoung Kim; Dalhee Lee; Gunrae Kim; Seungbae Lee; Taesjoong Song; Hwasung Rhee; Brandon Lee; Jaehee Choi (IRPS, 2021)

Standard Cell Design Optimization with Advanced MOL Technology in 3nm GAA Process. - Giyoung Yang; Hakchul Jung; Jinyoung Lim; Jaewoo Seo; Ingyum Kim; Jisu Yu; Hyeoungyu You; Jeongsoon Kong; Garoom Kim; Minjae Jeong; Chanhee Park; Sera An; et al. (VLSI Technology and Circuits, 2022)